US5837566A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Vertical interconnect process for silicon segments
Assignee: VERTICAL CIRCUITS SOLUTIONS Inc
•
Filing: 1997-04-24
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Granted: 1998-11-17
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Expires: 2017-04-24
Abstract
Abstract A method and apparatus for vertically interconnecting stacks of silicon segments. Each segment includes a plurality of adjacent die on a semiconductor wafer. The plurality of die on a segment are interconnected on the segment using one or more layers of metal interconnects which extend to all four sides of the segment to provide edge bonding pads for external electrical connection points. After the die are interconnected, each segment is cut from the backside of the wafer using a bevel cut to provide four inwardly sloping edge walls on each of the segments. After the segments are cut from the wafer, the segments are placed on top of one another to form a stack. Vertically adjacent segments in the stack are electrically interconnected by applying electrically conductive epoxy to all four sides of the stack. The inwardly sloping edge walls of each of the segments in the stack provide a recess which allows the electrically conductive epoxy to access the edge bonding pads and lateral circuits on each of the segments once the segments are stacked. The stack of electrically interconnected segments is then mounted below the surface of a circuit board and electrically connected to circuits on the board by applying traces of electrically conductive epoxy between the bonding pads on the top segment of the stack and the circuit board.
Inventors
- 👤 David V. Pedersen
- 👤 Michael G. Finley
- 👤 Kenneth M. Sautter
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 12:23
CPC Classifications
H; H01; H01R; H01R29/00; H01R4/00; H01R4/04; H05; H05K; H05K3/00; H05K3/30; H05K3/303; H05K3/305; H05K3/32; H05K3/321; H05K7/00; H05K7/02; H05K7/023; H10; H10D; H10D62/00; H10D62/10; H10D62/117; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4473; H10W20/482; H10W20/484; H10W20/49; H10W20/493; H10W40/00; H10W40/20; H10W40/25; H10W40/251; H10W70/00; H10W70/60; H10W70/611; H10W70/62; H10W70/641; H10W72/00; H10W72/20; H10W90/00; H10W90/401; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09472; H05K2201/10; H05K2201/10431; H05K2201/10439; H05K2201/10477; H05K2201/10613; H05K2201/10621; H05K2201/10674; H05K2201/10719; H05K2201/10727; H10W46/00; H10W70/099; H10W72/01; H10W72/071; H10W72/0711; H10W72/072; H10W72/07231; H10W72/07236; H10W72/073; H10W72/07331; H10W72/251; H10W72/30; H10W72/321; H10W72/325; H10W72/351; H10W72/353; H10W72/354; H10W72/834; H10W90/20; H10W90/22; H10W90/284; H10W90/701; H10W90/721; H10W90/722; H10W90/731; H10W90/732; H10W90/751; H10W90/754; Y; Y02; Y02P; Y02P70/00; Y02P70/50
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
229 words
A method for forming a stack of segments, comprising the steps of: providing a wafer having a plurality of die; creating a plurality of segments, each one of said plurality of segments formed by grouping a plurality of adjacent ones of said die on said wafer, interconnecting said plurality of adjacent die on said each one of said plurality of segments; separating said each one of said plurality of segments from said wafer; placing said plurality of segments on top of one another to create a stack of segments, said stack having external vertical sides; electrically interconnecting said stack of segments; providing internal electrically conductive contact points on each of said plurality of die; providing external electrically conductive contact points said each one of said plurality of segments; providing a layer of metal traces on said each one of said plurality of segments, said metal traces extending between said internal electrically conductive contact points on said plurality of die and said external electrically conductive contact points on said each one of said plurality of segments; and applying electrically conductive epoxy to more than one of said external vertical sides of said stack such that said electrically conductive epoxy is in contact with said external electrically conductive contact points on said each one of said segments in said stack, to thereby electrically interconnect said plurality of segments in said stack.
Claim 2
Independent Claim
229 words
A method for forming a stack of segments, comprising the steps of: providing a wafer having a plurality of die; creating a plurality of segments, each one of said plurality of segments formed by grouping a plurality of adjacent ones of said die on said wafer, interconnecting said plurality of adjacent die on said each one of said plurality of segments; separating said each one of said plurality of segments from said wafer; placing said plurality of segments on top of one another to create a stack of segments, said stack having external vertical sides; electrically interconnecting said stack of segments; providing internal electrically conductive contact points on each of said plurality of die; providing external electrically conductive contact points said each one of said plurality of segments; providing a layer of metal traces on said each one of said plurality of segments, said metal traces extending between said internal electrically conductive contact points on said plurality of die and said external electrically conductive contact points on said each one of said plurality of segments; and applying electrically conductive epoxy to more than one of said external vertical sides of said stack such that said electrically conductive epoxy is in contact with said external electrically conductive contact points on said each one of said segments in said stack, to thereby electrically interconnect said plurality of segments in said stack.
Claim 3
Dependent Claim
70 words
A method for forming a stack of segments as in claim 1 further including the steps of: providing control bond pads on each of said segments; providing control signals to said stack from an external source for access to said segments in said stack; and making said control signals for each of said segments unique by burning a unique pattern into said control bond pads on each of said segments.
Claim 4
Dependent Claim
83 words
A method for forming a stack of segments as in claim 2 wherein said stack includes a top segment, said method further comprising the steps of: providing a signal carrying substrate having circuitry and a hole therein; affixing said stack of segments in said hole; and electrically connecting said stack of segments to said signal carrying substrate by applying traces of electrically conductive epoxy between said signal carrying substrate and said external electrically conductive contact points on said top segment of said stack.
Claim 5
Dependent Claim
26 words
A method for forming a stack of segments as in claim 3 wherein said top stack is co-planer with the surface of said signal carrying substrate.
Claim 6
Dependent Claim
30 words
A method for forming a stack of segments as in claim 4 wherein said traces of electrically conductive epoxy lie in substantially the same plane as said signal caring substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-11-16 | 2002-05-18 | 2002-11-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-11-16 | 2006-05-18 | 2006-11-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-11-16 | 2010-05-18 | 2010-11-17 | $7700.00 | Window Closed / Lapsed |