Process for fabricating transistors using composite nitride structure

Claim 2

In the fabrication of an integrated circuit transistor having an electrode to which electrical contact is to be made, the electrode being proximate to another structure of the integrated circuit to which electrical contact is not to be made and wherein said another structure is surrounded by dielectric layers, the process comprising the steps of: establishing a first nitride layer that completely covers said electrode and overlies a first region that includes said electrode and said other structure, said first nitride layer and said electrode being formed by in-situ reaction of a deposited transition metal followed by reactive-sputter deposition of a transition metal nitride or refractory metal nitride; establishing a second nitride layer over said first nitride layer; patterning said second nitride layer to leave portions of said second nitride layer covering said electrode; and oxidizing said first nitride layer using said portions of said second layer as a mask, so that exposed portions of said first nitride layer are converted into an insulating layer.

Claim 3

The process according to claim 1 further comprising the steps of: establishing an additional nitride layer over said first and second nitride layers, said additional nitride layer providing oxidation protection for said first nitride layer; establishing a thick dielectric layer over said nitride layers; performing a high temperature reflow anneal to said thick dielectric layer in an oxidizing ambient; and etching said thick dielectric layer and said nitride layers to open a widow over said electrode, so that a contact material can be place in said window to become electrically coupled to said electrode.

Claim 4

The process of claim 1 further comprising the steps of: depositing a relatively thick dielectric over the entire structure before performing a high temperature reflow anneal in an oxidizing ambient to oxidize said first nitride layer using said portions of said second nitride layer as a mask, so that exposed portions of said first nitride layer are substantially converted into said insulating layer; and etching said relatively thick dielectric layer and said nitride layers to open a window over said electrode, so that a contact material can be placed in said window to become electrically coupled to said electrode.

Claim 5

The process according to claim 3 wherein said second nitride layer comprises silicon nitride and said first nitride layer comprises titanium nitride and said step of etching said window through said thick dielectric layer uses plasma etch conditions which favor a rapid etch rate through silicon oxide as a first etch step; said process further comprising the step of etching through said second nitride layer to said first nitride layer using a second plasma etch condition which has extremely high etch selectivity between said first and second nitride layers.

Claim 6

The process according to claim 1 further comprising the step of implanting a high concentration of impurities into said electrode after establishing said first and second nitride layers so that a resulting impurity region is offset from adjacent structures in an amount corresponding to the thickness of said first and second nitride layers.

Claim 7

The process of claim 1 wherein said first region has sidewalls, said process further comprising the step of establishing a dielectric spacer on said sidewalls of said first region prior to establishing said first nitride layer.

Claim 8

The process of claim 1 further comprising the step of forming a local interconnect with titanium nitride as an electrical connection to an element selected from the group consisting of a transistor source, drain and gate region.

Claim 9

In the fabrication of an integrated circuit transistor having an electrode to which electrical contact is to be made, the electrode being proximate to another structure of the integrated circuit to which electrical contact is not to be made and wherein said another structure is surrounded by dielectric layers, a process comprising the steps of: establishing a first nitride layer that completely covers the electrode and overlies a first region that includes the electrode and the other structure, the first nitride layer and the electrode being formed by in-situ reaction of a deposited transition metal followed by reactive-sputter deposition of a transition metal nitride or refractory metal nitride; establishing a second nitride layer over the first nitride layer patterning the second nitride layer to leave portions of the second nitride layer covering the electrode; and oxidizing the first nitride layer using the portions of said second layer as a mask, so that the exposed portions of the first nitride layer are converted into an insulative layer and; establishing an additional nitride layer over said first and second nitride layers, said additional nitride layer providing oxidation protection for said first nitride layer; depositing a thick dielectric layer over said nitride layers; performing a high temperature reflow anneal to said thick dielectric layer in an oxidizing ambient; etching said thick dielectric layer and nitride layers to open a window over said electrode, so that a contact material can be placed in said window to become electrically coupled to said electrode; depositing a conductive refractory material such that it becomes electrically coupled to said electrode, patterning said conductive refractory material by photolithography and etching to form a conductive interconnect layer; depositing an additional thick dielectric layer over said conductive refractory material; performing a high temperature reflow anneal to said additional thick dielectric layer an oxidizing or non-oxidizing ambient; etching said additional thick dielectric layer to open a window over said conductive refractory interconnect; and depositing and patterning a final conductive interconnect layer.

Claim 10

In the fabrication of an integrated circuit transistor having an electrode to which electrical contact is to be made, the electrode being proximate to another structure of the integrated circuit to which electrical contact is not to be made and wherein said another structure is surrounded by dielectric layers, a process comprising the steps of: establishing a first nitride layer that completely covers the electrode and overlies a first region that includes the electrode and the other structure, the first nitride layer and the electrode being formed by in-situ reaction of a deposited transition metal followed by reactive-sputter deposition of a transition metal nitride or refractory metal nitride; establishing a second nitride layer over the first nitride layer patterning the second nitride layer to leave portions of the second nitride layer covering the electrode; and oxidizing the first nitride layer using the portions of said second layer as a mask, so that the exposed portions of the first nitride layer are converted into an insulative layer and; establishing an additional nitride layer over said first and second nitride layers, said additional nitride layer providing oxidation protection for said first nitride layer; depositing a thick dielectric layer over said nitride layers; performing a high temperature reflow anneal to said thick dielectric layer in an oxidizing ambient; etching said thick dielectric layer and nitride layers to open a window over said electrode, so that a contact material can be placed in said window to become electrically coupled to said electrode; depositing a conductive refractory material such that it becomes electrically coupled to said electrode, patterning said conductive refractory material by photolithography and etching to form a conductive interconnect layer; depositing an additional thick dielectric layer over said conductive refractory material; performing a high temperature reflow anneal to said additional thick dielectric layer an oxidizing or non-oxidizing ambient; etching said additional thick dielectric layer to open a window over said conductive refractory interconnect; and depositing and patterning a final conductive interconnect layer.

Claim 11

The process according to claim 8 where said conductive refractory material is titanium nitride.

Claim 12

The process according to claim 8 where the conductive refractory material is a titanium tungsten alloy.

Claim 13

The process according to claim 8 where the conductive refractory material is a silicide material from the group consisting of tungsten silicide, molybdenum silicide, platinum silicide, or titanium silicide.