EP0151476A2
Expired / Lapsed
EP
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A read only memory and a method of manufacturing the same
Assignee: Toshiba Corp
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Filing: 1985-02-01
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Granted: —
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Expires: 2005-02-01
Abstract
Abstract A MOSFET read only memory is disclosed. A silicon ..material (14) directly contacts a drain (12) of a memory cell transistor formed in a silicon substrate (11) to obtain a low contact resistance. A drain electrode layer (14) partially covers two oxide films (22 and 23) which are above a gate electrode (1), to increase a contact area between a metal wiring layer (2) constituting an output line (2) and the drain electrode layer (14).
Inventors
- 👤 Taira C/O Patent Division Iwase
- 👤 Shoji C/O Patent Division Ariizumi
- 👤 Fujio C/O Patent Division Masuoka
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 08:45
CPC Classifications
H; H10; H10B; H10B20/00; H10D; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/258
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
96 words
A read only memory comprising: a semiconductor substrate (11); source and drain regions (13, 12) formed in said substrate; and a gate electrode (1) formed on a first insulating film (21) formed in an area of said substrate (11) between said source and drain regions (13, 12); characterized by further comprising a drain electrode (14) contacting said drain region (12) so as to provide a low contact resistance and partially covering second and third insulating films (22, 23) which are above said gate electrode (1); and a wiring layer (2) formed on said drain electrode (14).
Claim 2
Dependent Claim
96 words
A read only memory comprising: a semiconductor substrate (11); source and drain regions (13, 12) formed in said substrate; and a gate electrode (1) formed on a first insulating film (21) formed in an area of said substrate (11) between said source and drain regions (13, 12); characterized by further comprising a drain electrode (14) contacting said drain region (12) so as to provide a low contact resistance and partially covering second and third insulating films (22, 23) which are above said gate electrode (1); and a wiring layer (2) formed on said drain electrode (14).
Claim 3
Dependent Claim
25 words
A memory according to claim 1, characterized in that said semiconductor substrate (11) comprises a silicon substrate, and said drain electrode comprises polycrystalline silicon. :
Claim 4
Dependent Claim
18 words
A memory according to claim 2, characterized in that polycrystalline silicon of said drain electrode contains an impurity.
Claim 5
Dependent Claim
20 words
A memory according to claim 2, characterized in that polycrystalline silicon of said drain electrode does not contain an impurity.
Claim 6
Dependent Claim
17 words
A memory according to claim 1, characterized in that said drain electrode comprises a high-melting metal silicide.
Claim 7
Independent Claim
121 words
A method of manufacturing a read only memory, characterized by comprising the steps of: forming a gate electrode (1) on a first insulating film (21) formed on a semiconductor substrate (11); forming source and drain regions (13, 12) in said substrate (11) by using said gate electrode (1) as a mask; forming second and third insulating films (22, 23) having a common contact hole for partially exposing said drain region (12) and covering said gate electrode (1); forming a drain electrode layer (14) which extends through said contact hole and contacts said drain region, thus providing a low contact resistance, and which extends above said gate electrode (1); and forming a metal wiring layer (2) on said drain electrode layer (14).
Claim 8
Independent Claim
121 words
A method of manufacturing a read only memory, characterized by comprising the steps of: forming a gate electrode (1) on a first insulating film (21) formed on a semiconductor substrate (11); forming source and drain regions (13, 12) in said substrate (11) by using said gate electrode (1) as a mask; forming second and third insulating films (22, 23) having a common contact hole for partially exposing said drain region (12) and covering said gate electrode (1); forming a drain electrode layer (14) which extends through said contact hole and contacts said drain region, thus providing a low contact resistance, and which extends above said gate electrode (1); and forming a metal wiring layer (2) on said drain electrode layer (14).
Claim 9
Dependent Claim
27 words
A method according to claim 6, characterized in that an impurity is ion-implanted into a gate region immediately after the step of forming said gate electrode (1).
References Cited (Backward Citations)
No citation records indexed.
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