US4826781A
Expired / Lapsed
US
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Semiconductor device and method of preparation
Assignee: Seiko Epson Corp
•
Filing: 1987-03-02
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Granted: 1989-05-02
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Expires: 2007-03-02
Abstract
Abstract A method for preparing an improved semiconductor device having a transistor and a capacitor or an element isolating region in or on a semiconductor substrate by a self-alignment process is provided. Each of the elements is formed using a previously formed element as a mask so that no additional processes are necessary to align the elements at the desired position. Specifically, a gate electrode is formed first and then a capacitor, element isolating region and contact hole are formed in such a way that the room required for alignment of the gate electrode and the capacitor, the gate electrode and the element isolating region and the gate electrode and the contact hole is reduced. The process is extremely advantageous for miniaturization of the semiconductor device. The device prepared by such a process is also provided.
Inventors
- 👤 Michio Asahina
- 👤 Makio Goto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 00:22
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038; H10D; H10D62/00; H10D62/01; H10D62/021; H10D84/00; H10P; H10P50/00; H10P50/69; H10P50/691; H10P50/693; H10P50/695; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/014; H10W10/10; H10W10/13; H10W10/17; H10W20/00; H10W20/01; H10W20/031; H10W20/069; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
191 words
A method for preparing a semiconductor device comprising: providing a semiconductor substrate: forming a gate insulating film on the semiconductor substrate; forming a gate electrode on the gate insulating film; forming an anti-anisotropic etching film on the gate electrode, said anti-anisotropic etching film being adapted to mask silicon so that the masked silicon can not be anisotropically etched; etching the gate electrode using the anti-anisotropic etching film as a mask; forming a diffused source and drain region in the substrate using the gate electrode as a mask; forming a first insulating film on the substrate and the anti-anisotropic etching film; selectively etching the first insulating film by an anisotropic etching process to form a side wall insulating film at the side of the gate electrode overlapping a portion of the diffused regions in plan view; and etching the substrate in the region of the remainder of the diffused regions using the anti-anisotropic etching film and the side wall insulating film as a mask so as to form a groove in the substrate by a self-aligning process with a portion of the diffused region masked by the side wall insulating film remaining.
Claim 2
Independent Claim
191 words
A method for preparing a semiconductor device comprising: providing a semiconductor substrate: forming a gate insulating film on the semiconductor substrate; forming a gate electrode on the gate insulating film; forming an anti-anisotropic etching film on the gate electrode, said anti-anisotropic etching film being adapted to mask silicon so that the masked silicon can not be anisotropically etched; etching the gate electrode using the anti-anisotropic etching film as a mask; forming a diffused source and drain region in the substrate using the gate electrode as a mask; forming a first insulating film on the substrate and the anti-anisotropic etching film; selectively etching the first insulating film by an anisotropic etching process to form a side wall insulating film at the side of the gate electrode overlapping a portion of the diffused regions in plan view; and etching the substrate in the region of the remainder of the diffused regions using the anti-anisotropic etching film and the side wall insulating film as a mask so as to form a groove in the substrate by a self-aligning process with a portion of the diffused region masked by the side wall insulating film remaining.
Claim 3
Dependent Claim
35 words
The method of claim 1 further comprising: forming a capacitor oxide film in the groove by thermal oxidation; and forming a polycrystalline silicon on the capacitor oxide film so as to form a capacitor electrode.
Claim 4
Dependent Claim
47 words
The method of claim 2 further comprising: forming an interlayer insulating oxide film on the device; providing a resist pattern mask on the interlayer insulating oxide film; etching the interlayer insulating oxide film to form a contact hole; and providing a connector material in the contact hole.
Claim 5
Dependent Claim
35 words
The method of claim 1 further comprising; forming element isolating oxide regions in the semiconductor substrate prior to forming the gate insulating film; and, forming the gate insulating film between adjacent element isolating oxide regions.
Claim 6
Dependent Claim
14 words
The method of claim 1, wherein the semiconductor substrate is a P-type semiconductor substrate.
Claim 7
Dependent Claim
15 words
The method of claim 1, wherein the gate insulating film is formed by thermal oxidation.
Claim 8
Dependent Claim
28 words
The method of claim 1, wherein the gate electrode includes a polycrystalline silicon layer on the gate insulating film and a nitride film on the polycrystalline silicon layer.
Claim 9
Dependent Claim
25 words
The method of claim 7, wherein the polycrystalline silicon layer is formed by chemical vapor deposition to a thickness between about 1500 and 4000 Å.
Claim 10
Dependent Claim
24 words
The method of claim 8, wherein phosphorus is thermally diffused into the polycrystalline silicon layer at a temperature between about 800° and 1000° C.
Claim 11
Dependent Claim
24 words
The method of claim 7, wherein the nitride film is formed by chemical vapor deposition to a thickness between about 2000 and 4000 Å.
Claim 12
Dependent Claim
30 words
The method of claim 1, wherein the anti-anisotropic etching film is a one of a nitride film or silicide film and having a thickness between about 100 and 200 Å.
Claim 13
Dependent Claim
23 words
The method of claim 1, wherein the diffused region is formed by ion implantation of an N-type impurity and annealing of the device.
Claim 14
Dependent Claim
14 words
The method of claim 1, wherein the first insulating film is a nitride film.
Claim 15
Dependent Claim
24 words
The method of claim 13, wherein the nitride film is formed by chemical vapor deposition to a thickness between about 2000 and 4000 Å.
Claim 16
Dependent Claim
17 words
The method of claim 1, wherein the first insulating film is selectively etched by reactive ion etching.
Claim 17
Dependent Claim
31 words
The method of claim 1 further comprising masking at least a portion of the diffused region and removing the gate insulating film on the unmasked portion prior to etching the substrate.
Claim 18
Dependent Claim
16 words
The method of claim 16, wherein the gate insulating film is removed using dilute hydrofluoric acid
Claim 19
Dependent Claim
14 words
The method of claim 1, wherein the substrate is etched by reactive ion etching.
Claim 20
Dependent Claim
33 words
The method of claim 2, wherein the polycrystalline silicon is formed on the capacitor oxide film by chemical vapor deposition and is etched using a resist pattern mask to form the capacitor electrode.
Claim 21
Dependent Claim
26 words
The method of claim 3, wherein the interlayer insulating oxide film is formed by chemical vapor deposition to a thickness between about 3000 and 6000 Å.
Claim 22
Dependent Claim
11 words
The method of claim 3, wherein the connector material is aluminum.
Claim 23
Dependent Claim
13 words
The method of claim 3, wherein the connector material is formed by sputtering.
Claim 24
Dependent Claim
75 words
The method of claim 1 further comprising: coating the entire surface of the device with a silica series coating film after selectively etching the first insulating film; baking the coated device at a temperature between about 100° and 200° C.; annealing the device in a nitride atmosphere at a temperature between about 800° and 1000° C.; and reducing the thickness of the silica series coating film using dilute hydrofluoric acid prior to etching the substrate.
Claim 25
Dependent Claim
16 words
The method of claim 23, wherein the silica series coating film is provided by spin coating.
Claim 26
Dependent Claim
28 words
The method of claim 1, wherein the gate electrode includes a polycrystalline silicon layer on the gate insulating film and a molybdenum film on the polycrystalline silicon layer.
Claim 27
Dependent Claim
45 words
The method of claim 25, wherein the polycrystalline silicon layer is formed by chemical vapor deposition to a thickness between about 1500 and 4000 Å and wherein phosphorus is thermally diffused into the polycrystalline silicon layer at a temperature between about 800° and 1000° C.
Claim 28
Dependent Claim
24 words
The method of claim 25, wherein the molybdenum film is formed by chemical vapor deposition to a thickness between about 2000 and 4000 Å.
Claim 29
Dependent Claim
13 words
The method of claim 4, wherein the gate electrode is a tungsten film.
Claim 30
Dependent Claim
129 words
The method of claim 1 further comprising: forming an element isolating oxide film in the groove so that a portion of the semiconductor substrate at the side portion of the groove beneath the side wall insulating film is exposed; introducing an impurity into the exposed portion of the semiconductor substrate to form secondary source and drain regions in a region below the source and drain regions masked by the side wall; forming connectors from the secondary source and drain regions across the element isolating oxide film; forming an interlayer insulating film on the entire surface of the device; forming a contact hole in the interlayer insulating film over the connector; and forming an upper layer connector for electrically connecting the secondary source and drain regions through the contact hole.
Claim 31
Dependent Claim
131 words
The method of claim 1 further comprising: coating the device with glass; annealing the glass-coated device to form a stopper layer and an element isolating oxide film; selectively etching the glass to expose a portion of the substrate; depositing a layer of titanium on the gate electrode, the side wall insulating film and the exposed portion of the substrate; annealing the titanium layer which contacts the substrate to form Ti x Si y to form source and drain regions; diffusing an impurity by ion implantation for form diffused regions beneath the Ti x Si y ; forming a protective layer on the Ti x Si y layer and on the gate electrode to separate the gate, source and drain regions; and, forming a connector between adjacent gate electrodes by contact etching.
Claim 32
Dependent Claim
20 words
The method of claim 30, wherein the glass is boron silicate glass having a thickness up to about 8000 Å.
Claim 33
Dependent Claim
20 words
The method of claim 30, wherein the glass is annealed for 30 seconds at a temperature of about 1000° C.
Claim 34
Dependent Claim
24 words
The method of claim 29, wherein the substrate is of a first conductive type and the diffused regions are of a second conductive type.
Claim 35
Dependent Claim
13 words
The method of claim 1, wherein the anti-anisotropic etching film is molybdenum silicide.
Claim 36
Dependent Claim
100 words
The method of claim 1 further comprising: depositing a layer of titanium on the gate electrode, the side wall insulating film and the exposed portion of the substrate; annealing the titanium layer which contacts the substrate to form Ti x Si y to form source and drain regions; diffusing an impurity by ion implantation for form diffused regions beneath the Ti x Si y ; forming a protective layer on the Ti x Si y layer and on the gate electrode to separate the gate, source and drain regions; and, forming a connector between adjacent gate electrodes by contact etching.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-05-01 | 1992-10-31 | 1993-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-05-01 | 1996-10-31 | 1997-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-05-01 | 2000-10-31 | 2001-05-02 | $7700.00 | Window Closed / Lapsed |