US5412244A
Expired / Lapsed
US
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Electrically-programmable low-impedance anti-fuse element
Assignee: Microsemi SoC Corp
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Filing: 1993-04-29
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Granted: 1995-05-02
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Expires: 2013-04-29
Abstract
Abstract Electrically-programmable low-impedance antifuses are disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The antifuses of the present invention include a first conductive electrode which may be formed as a diffusion region in a semiconductor substrate or may be formed from a semiconductor material, such as polysilicon, located above and insulated from the substrate. A dielectric layer is disposed over the first electrode. A second electrode is formed over the dielectric layer from a semiconductor material such as polysilicon, or metal having a barrier metal underneath. At least one of the two electrodes of each antifuse is highly-doped or implanted with arsenic such that high concentrations of arsenic exist at the interface between the electrode and the dielectric layer.
Inventors
- 👤 Esmat Z. Hamdy
- 👤 Amr M. Mohsen
- 👤 John L. McCollum
- 👤 Shih-ou Chen
- 👤 Steve S. Chiang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 05:59
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
81 words
An electrically-programmable, low-impedance antifuse element disposed in an integrated circuit formed on a semiconductor substrate, including: a first electrode comprising a region in said substrate containing arsenic at a concentration of between about 1×10 19 to 1×10 22 atoms/cm 3 , said region having an arsenic pileup doping profile at an upper surface thereof; a dielectric layer disposed over said upper surface of said first electrode; and a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 2
Dependent Claim
81 words
An electrically-programmable, low-impedance antifuse element disposed in an integrated circuit formed on a semiconductor substrate, including: a first electrode comprising a region in said substrate containing arsenic at a concentration of between about 1×10 19 to 1×10 22 atoms/cm 3 , said region having an arsenic pileup doping profile at an upper surface thereof; a dielectric layer disposed over said upper surface of said first electrode; and a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 3
Dependent Claim
27 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein the arsenic concentration of said second electrode is between about 1×10 19 to 1×10 22 atoms/cm 3 .
Claim 4
Dependent Claim
16 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein said region is ion implanted with arsenic.
Claim 5
Dependent Claim
23 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein said dielectric layer comprises a layer of silicon dioxide disposed over said lower electrode.
Claim 6
Dependent Claim
23 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein said dielectric layer comprises a layer of silicon nitride disposed over said lower electrode.
Claim 7
Dependent Claim
36 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein said dielectric layer comprises a first layer of silicon dioxide disposed over said lower electrode and a second layer of silicon nitride disposed over said first layer.
Claim 8
Dependent Claim
23 words
The electrically-programmable, low-impedance antifuse element of claim 2 wherein said dielectric layer comprises a layer of silicon dioxide disposed over said lower electrode.
Claim 9
Dependent Claim
23 words
The electrically-programmable, low-impedance antifuse element of claim 2 wherein said dielectric layer comprises a layer of silicon nitride disposed over said lower electrode.
Claim 10
Dependent Claim
36 words
The electrically-programmable, low-impedance antifuse element of claim 2 wherein said dielectric layer comprises a first layer of silicon dioxide disposed over said lower electrode and a second layer of silicon nitride disposed over said first layer.
Claim 11
Dependent Claim
73 words
An electrically-programmable, low-impedance antifuse element disposed in a microcircuit, including: a first electrode disposed on an insulating layer, said first electrode comprising a layer of arsenic-containing polysilicon wherein the arsenic concentration of said first electrode is an arsenic pileup doping profile at an upper surface thereof; a dielectric layer disposed over said upper surface of said first electrode; and a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 12
Dependent Claim
73 words
An electrically-programmable, low-impedance antifuse element disposed in a microcircuit, including: a first electrode disposed on an insulating layer, said first electrode comprising a layer of arsenic-containing polysilicon wherein the arsenic concentration of said first electrode is an arsenic pileup doping profile at an upper surface thereof; a dielectric layer disposed over said upper surface of said first electrode; and a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 13
Dependent Claim
27 words
The electrically-programmable, low-impedance antifuse element of claim 10 wherein the arsenic concentration in said first electrode is between about 1×10 19 to 1×10 22 atoms/cm 3 .
Claim 14
Dependent Claim
36 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein said dielectric layer comprises a first layer of silicon nitride disposed over said lower electrode and a second layer of silicon dioxide disposed over said first layer.
Claim 15
Dependent Claim
36 words
The electrically-programmable, low-impedance antifuse element of claim 2 wherein said dielectric layer comprises a first layer of silicon nitride disposed over said lower electrode and a second layer of silicon dioxide disposed over said first layer.
Claim 16
Dependent Claim
16 words
The electrically-programmable, low-impedance antifuse element of claim 10 wherein said region is ion implanted with arsenic.
Claim 17
Dependent Claim
23 words
The electrically-programmable, low-impedance antifuse element of claim 10 wherein said dielectric layer comprises a layer of silicon dioxide disposed over said lower electrode.
Claim 18
Dependent Claim
23 words
The electrically-programmable, low-impedance antifuse element of claim 10 wherein said dielectric layer comprises a layer of silicon nitride disposed over said lower electrode.
Claim 19
Dependent Claim
36 words
The electrically-programmable, low-impedance antifuse element of claim 10 wherein said dielectric layer comprises a first layer of silicon dioxide disposed over said lower electrode and a second layer of silicon nitride disposed over said first layer.
Claim 20
Dependent Claim
36 words
The electrically-programmable, low-impedance antifuse element of claim 10 wherein said dielectric layer comprises a first layer of silicon nitride disposed over said lower electrode and a second layer of silicon oxide disposed over said first layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-05-01 | 1998-10-31 | 1999-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-05-01 | 2002-10-31 | 2003-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-05-01 | 2006-10-31 | 2007-05-02 | $7700.00 | Window Closed / Lapsed |