Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
172 words
In an electrically programmable read only memory including a matrix of first and second type information lines, the matrix having memory cells located at the intesections of at least some of the first and second type information lines and means for storing information in the cell, the improvement comprising: a memory cell having a transistor including collector, base and emitter regions, the base region of the transistor being connected to an information line of the first type and the collector region being adapted to be connected to a variable voltage supply, the memory cell also including a dielectric layer which is an oxide or titanate of a transition metal having a first surface directly overlying at least a portion of the transistor emitter region and a second surface in electrical communication with an information line of the second type; and means for electrically puncturing the dielectric layer at selected cells to establish an ohmic contact between the transistor emitter region and the second type information line when storing information in the cell.
Claim 2
Dependent Claim
172 words
In an electrically programmable read only memory including a matrix of first and second type information lines, the matrix having memory cells located at the intesections of at least some of the first and second type information lines and means for storing information in the cell, the improvement comprising: a memory cell having a transistor including collector, base and emitter regions, the base region of the transistor being connected to an information line of the first type and the collector region being adapted to be connected to a variable voltage supply, the memory cell also including a dielectric layer which is an oxide or titanate of a transition metal having a first surface directly overlying at least a portion of the transistor emitter region and a second surface in electrical communication with an information line of the second type; and means for electrically puncturing the dielectric layer at selected cells to establish an ohmic contact between the transistor emitter region and the second type information line when storing information in the cell.
Claim 3
Dependent Claim
48 words
The memory in accordance with claim 1 wherein the information lines of the first and second type are, respectively, word and bit lines and wherein the cell transistor base region is electrically connected to a word line and the cell dielectric layer is coupled to a bit line.
Claim 4
Dependent Claim
16 words
The memory in accordance with claim 1 or 2 wherein the dielectric layer is tantalum oxide.
Claim 5
Dependent Claim
16 words
The memory in accordance with claim 1 or 2 wherein the dielectric layer is vanadium oxide.
Claim 6
Dependent Claim
16 words
The memory in accordance with claim 1 or 2 wherein the dielectric layer is zirconium oxide.
Claim 7
Dependent Claim
16 words
The memory in accordance with claim 1 or 2 wherein the dielectric layer is niobium oxide.
Claim 8
Dependent Claim
16 words
The memory in accordance with claim 1 or 2 wherein the dielectric layer is barium titanate.
Claim 9
Dependent Claim
16 words
The memory in accordance with claim 1 or 2 wherein the dielectric layer is strontium titanate.
Claim 10
Dependent Claim
24 words
The memory in accordance with claim 1 or 2 wherein the dielectric layer has a thickness of between 20×10 -6 and 100×10 -6 mm.
Claim 11
Dependent Claim
20 words
The memory in accordance with claim 9 wherein the dielectric layer has a breakdown voltage between 1 and 4 volts.