US4322822A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High density VMOS electrically programmable ROM
Assignee: Individual
•
Filing: 1979-01-02
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Granted: 1982-03-30
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Expires: 1999-01-02
Abstract
Abstract An electrically programmable memory array is made by a process in which the memory elements are capacitor devices formed in anisotropically etched V-grooves to provide enhanced dielectric breakdown at the apex of the groove. After breakdown, a cell exhibits a low resistance to a grounded substrate. Access transistors in series with the memory elements have control gates which also form address lines. The oxide thickness in the V-groove may be thinner than the gate oxide thickness for the access transistor providing a lower programming voltage. These factors provide a very small high speed device.
Inventors
- 👤 Roger K. McPherson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 04:55
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H; H10; H10B; H10B41/00; H10B69/00; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
74 words
An electrically programmable semiconductor device comprising an array of rows and columns of cells, each cell including: a V-shaped groove in a face of a semiconductor body, a thin insulating coating on said face in said groove, and a conductive layer over said coating; some of said cells of the device having an electrical short through said coating at the apex of the groove and other of said cells having no such electrical short.
Claim 2
Dependent Claim
74 words
An electrically programmable semiconductor device comprising an array of rows and columns of cells, each cell including: a V-shaped groove in a face of a semiconductor body, a thin insulating coating on said face in said groove, and a conductive layer over said coating; some of said cells of the device having an electrical short through said coating at the apex of the groove and other of said cells having no such electrical short.
Claim 3
Dependent Claim
12 words
A device according to claim 1 wherein the semiconductor body is silicon.
Claim 4
Dependent Claim
16 words
A device according to claim 2 wherein the groove is anisotropically etched into the (100) plane.
Claim 5
Dependent Claim
19 words
A device according to claim 2 wherein the conductive layer is polycrystalline silicon and the coating is silicon oxide.
Claim 6
Dependent Claim
20 words
A device according to claim 4 wherein the silicon body includes an N+ substrate and a highly resistive epitaxial layer.
Claim 7
Dependent Claim
25 words
A device according to claim 5 wherein an N-channel MOS transistor is connected in series with said conductive layer at said face for each cell.
Claim 8
Dependent Claim
19 words
A device according to claim 6 wherein said transistor has a gate oxide thickness greater than said insulating coating.
Claim 9
Dependent Claim
89 words
An electrically programmable semiconductor device comprising an array of rows and columns of cells at a face of a semiconductor body, each cell including a controlled switching device and a potentially shorted element, the potentially shorted element having an upper conductive layer and a lower conductive area of said face, the upper conductive layer being separated from the lower conductive area by a thin dielectric; some of the cells of said device having an electrical short through said dielectric and other of said cells having no such electrical short.
Claim 10
Dependent Claim
89 words
An electrically programmable semiconductor device comprising an array of rows and columns of cells at a face of a semiconductor body, each cell including a controlled switching device and a potentially shorted element, the potentially shorted element having an upper conductive layer and a lower conductive area of said face, the upper conductive layer being separated from the lower conductive area by a thin dielectric; some of the cells of said device having an electrical short through said dielectric and other of said cells having no such electrical short.
Claim 11
Dependent Claim
23 words
A device according to claim 8 wherein said controlled switching device in each of said cells is an insulated gate field effect transistor.
Claim 12
Dependent Claim
24 words
A device according to claim 9 wherein gates of all of said transistors in each row are connected in common as a row line.
Claim 13
Dependent Claim
27 words
A device according to claim 10 each transistor has a source-to-drain path connected in series between a column line and said upper conductive layer in each cell.
Claim 14
Dependent Claim
34 words
A device according to claim 11 wherein each of said potentially shorted elements includes a V-shaped groove in said face and the electrical short through said dielectric is at the apex of said groove.
References Cited (Backward Citations)
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US3641516A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-03-29 | 1985-09-28 | 1986-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-03-29 | 1989-09-28 | 1990-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-03-29 | 1993-09-28 | 1994-03-30 | $7700.00 | Window Closed / Lapsed |