Patent US4980270A successfully refreshed from Google Patents.
US4980270A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Printer circuit and a process for preparing same
Assignee: NEC Corp
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Filing: 1987-07-09
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Granted: 1990-12-25
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Expires: 2007-07-09
Abstract
Abstract A printed circuit comprising a substrate, a first conductive circuit pattern thereon and an insulator on the first conductive circuit pattern. The insulator has a via hole which extends down to and is tapered toward the first conductive circuit pattern. A second conductive circuit pattern is formed on the side wall of the via hole and on a portion of the first conductive circuit pattern. The tapered via hole allows the second conductive circuit pattern to ensure excellent electrical contact with the first conductive circuit pattern.
Inventors
- 👤 Jun Inasaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 23:41
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/0011; H05K3/0017; H05K3/0023; H05K2201/00; H05K2201/01; H05K2201/0183; H05K2201/0195; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09509; H05K2201/09818; H05K2201/09827; H05K3/46; H05K3/4644
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
299 words
A process for preparing a printed circuit, comprising the steps of: (a) forming a first conductive circuit pattern on a substrate; (b) forming a first photosensitive insulative layer on said first conductive circuit pattern; (c) exposing said first photosensitive insulative layer to first imagewise actinic radiation and developing the exposed first layer to form a first via hole extending through said first photosensitive insulative layer to said first conductive circuit pattern, so that a portion of said first conductive circuit pattern is exposed to the outside through said first via hole; (d) curing said first photosensitive insulative layer; (e) forming a second photosensitive insulative layer of the same material as that of said first photosensitive insulative layer on said cured first photosensitive insulative layer and on said exposed portion of said first conductive circuit pattern so that the first via hole is partially filled to create a depression having a taper in a direction toward said first conductive circuit pattern; (f) exposing said second photosensitive insulative layer to second imagewise actinic radiation and developing the exposed second layer to form a second via hole extending from the bottom of said depression created by the step (e) to said first conductive circuit pattern, so that a portion of said first conductive circuit pattern is again exposed to the outside and said second via hole has a smaller diameter than the diameter of said first via hole formed by the step (c); (g) curing said second photosensitive insulative layer; and (h) forming a second conductive circuit pattern on said cured second photosensitive insulative layer and on the portion of said first conductive circuit pattern exposed again by the step (f) so that the second conductive circuit pattern covers the sidewalls of said depression and the sidewalls of said second via hole.
Claim 2
Dependent Claim
299 words
A process for preparing a printed circuit, comprising the steps of: (a) forming a first conductive circuit pattern on a substrate; (b) forming a first photosensitive insulative layer on said first conductive circuit pattern; (c) exposing said first photosensitive insulative layer to first imagewise actinic radiation and developing the exposed first layer to form a first via hole extending through said first photosensitive insulative layer to said first conductive circuit pattern, so that a portion of said first conductive circuit pattern is exposed to the outside through said first via hole; (d) curing said first photosensitive insulative layer; (e) forming a second photosensitive insulative layer of the same material as that of said first photosensitive insulative layer on said cured first photosensitive insulative layer and on said exposed portion of said first conductive circuit pattern so that the first via hole is partially filled to create a depression having a taper in a direction toward said first conductive circuit pattern; (f) exposing said second photosensitive insulative layer to second imagewise actinic radiation and developing the exposed second layer to form a second via hole extending from the bottom of said depression created by the step (e) to said first conductive circuit pattern, so that a portion of said first conductive circuit pattern is again exposed to the outside and said second via hole has a smaller diameter than the diameter of said first via hole formed by the step (c); (g) curing said second photosensitive insulative layer; and (h) forming a second conductive circuit pattern on said cured second photosensitive insulative layer and on the portion of said first conductive circuit pattern exposed again by the step (f) so that the second conductive circuit pattern covers the sidewalls of said depression and the sidewalls of said second via hole.
Claim 3
Dependent Claim
20 words
The process as set forth in claim 1, wherein said first and second photosensitive insulative layers are composed of polyimide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-12-24 | 1994-06-25 | 1994-12-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-12-24 | 1998-06-25 | 1998-12-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-12-24 | 2002-06-25 | 2002-12-25 | $7700.00 | Window Closed / Lapsed |