Patent US6897467B2 successfully refreshed from Google Patents.
US6897467B2
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US
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Controllable ovanic phase-change semiconductor memory device
Assignee: Round Rock Research LLC
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Filing: 2003-01-17
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Granted: 2005-05-24
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Expires: 2023-01-17
Abstract
Abstract An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same, are disclosed. Such memory devices are formed by forming a tip protruding from a lower surface of a lower electrode element. An insulative material is applied over the lower electrode such that an upper surface of the tip is exposed. A chalcogenide material and an upper electrode are either formed atop the tip, or the tip is etched into the insulative material and the chalcogenide material and upper electrode are deposited within the recess. This allows the memory cells to be made smaller and allows the overall power requirements for the memory cell to be minimized.
Inventors
- 👤 Trung T. Doan
- 👤 D. Mark Durcan
- 👤 Brent D. Gilgen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:11
CPC Classifications
H; H10; H10N; H10N70/00; H10N70/20; H10N70/231; H10D; H10D64/00; H10D64/01; H10D64/011; H10B; H10B63/00; H10B63/80; H10N70/011; H10N70/061; H10N70/063; H10N70/066; H10N70/801; H10N70/821; H10N70/826; H10N70/841; H10N70/8418; H10N70/881; H10N70/882; H10N70/8828; G; G11; G11C; G11C2213/00; G11C2213/50; G11C2213/52
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
90 words
A computer including at least one semiconductor memory cell, the at least one semiconductor memory cell capable of being reversibly cycled between at least two different resistive states and comprising: a first conductive layer on a substrate, wherein the first conductive layer includes at least one raised portion; a programmable resistive material formulated to be reversibly cycled between at least two different resistive states in direct contact with the at least one raised portion of said the first conductive layer; and a second conductive layer above the programmable resistive material.
Claim 2
Dependent Claim
90 words
A computer including at least one semiconductor memory cell, the at least one semiconductor memory cell capable of being reversibly cycled between at least two different resistive states and comprising: a first conductive layer on a substrate, wherein the first conductive layer includes at least one raised portion; a programmable resistive material formulated to be reversibly cycled between at least two different resistive states in direct contact with the at least one raised portion of said the first conductive layer; and a second conductive layer above the programmable resistive material.
Claim 3
Dependent Claim
15 words
The computer of claim 1 , wherein the programmable resistive material comprises a chalcogenide material.
Claim 4
Dependent Claim
26 words
The computer of claim 2 , wherein the chalcogenide material is selected from a group consisting of tellurium (Te), germanium (Ge), antimony (Sb), and combinations thereof.
Claim 5
Dependent Claim
49 words
The computer of claim 2 , wherein the chalcogenide material includes tellurium (Te), germanium (Ge), and antimony (Sb) in a ratio of Te a Ge b Sb 100−(a+b) , where a, b, and 100−(a+b) are in atomic percentages which total 100% of the constituent elements and a≦70 and 15≦b≦50.
Claim 6
Dependent Claim
10 words
The computer of claim 4 , wherein 40≦a≦60 and 17≦b≦44.
Claim 7
Dependent Claim
22 words
The computer of claim 1 , further comprising a conductive barrier layer between the programmable resistive material and the second conductive layer.
Claim 8
Dependent Claim
20 words
The computer of claim 1 , wherein the second conductive layer is in direct contact with the programmable resistive material.
Claim 9
Dependent Claim
37 words
The computer of claim 1 , further comprising an interlayer dielectric over the second conductive layer, the interlayer dielectric including an aperture that exposes at least a portion of an upper surface of the second conductive layer.
Claim 10
Dependent Claim
15 words
The computer of claim 8 , further comprising a conductive grid interconnect within the aperture.
Claim 11
Dependent Claim
23 words
The computer of claim 9 , wherein the conductive grid interconnect is selected from the group consisting of titanium, titanium nitride and aluminum.
Claim 12
Dependent Claim
20 words
The computer of claim 1 , wherein a portion of the at least one raised portion comprises a frustoconical tip.
Claim 13
Dependent Claim
20 words
The computer of claim 11 , wherein the frustoconical tip has a frustum lateral dimension of at least 0.1 μm.
Claim 14
Dependent Claim
19 words
The computer of claim 11 , wherein the frustoconical tip has a frustum lateral dimension of about 0.4 μm.
Claim 15
Dependent Claim
17 words
The computer of claim 11 , wherein the frustoconical tip has a height of approximately 2000 Å.
Claim 16
Dependent Claim
16 words
The computer of claim 1 , wherein the second conductive layer comprises titanium nitride or carbon.
Claim 17
Dependent Claim
34 words
The computer of claim 1 , further comprising an insulative material over the first conductive layer and having an opening therethrough such that at least a portion of the first conductive layer is exposed.
Claim 18
Dependent Claim
16 words
The computer of claim 16 , wherein programmable resistive material is at least within the opening.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-05-23 | 2008-11-22 | 2009-05-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-05-23 | 2012-11-22 | 2013-05-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-05-23 | 2016-11-22 | 2017-05-24 | $7700.00 | Window Closed / Lapsed |