US6337266B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Small electrode for chalcogenide memories
Assignee: Round Rock Research LLC
•
Filing: 1996-07-22
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Granted: 2002-01-08
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Expires: 2016-07-22
Abstract
Abstract A method for fabricating an ultra-small electrode or plug contact for use in chalcogenide memory cells specifically, and in semiconductor devices generally, in which disposable spacers are utilized to fabricate ultra-small pores into which the electrodes are formed. The electrodes thus defined have minimum lateral dimensions ranging from approximately 500 to 4000 Angstroms. The pores thus defined may then be used to fabricate a chalcogenide memory cell or other semiconductor devices.
Inventors
- 👤 Russell C. Zahorik
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 00:28
CPC Classifications
H; H10; H10N; H10N70/00; H10N70/011; H10N70/061; H10N70/063; H10N70/20; H10N70/231; H10N70/801; H10N70/821; H10N70/826; H10N70/841; H10N70/881; H10N70/882; H10N70/8828; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/089; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/947
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
147 words
A method of fabricating a conductive path in a semiconductor device, comprising: applying a layer of a first material onto a substrate material; forming an edge feature in said layer of said first material; applying a layer of a second material onto said edge feature of said layer of said first material; applying a layer of a third material onto said layer of said second material; removing a portion of said layer of said third material; removing a portion of said layer of said second material to define a pore in said layer of said second material; applying a layer of a fourth material into said pore to define a conductive path in said layer of said second material; and planarizing the layer of the fourth material to leave the layer of the fourth material disposed only within the pore in said layer of said second material.
Claim 2
Independent Claim
147 words
A method of fabricating a conductive path in a semiconductor device, comprising: applying a layer of a first material onto a substrate material; forming an edge feature in said layer of said first material; applying a layer of a second material onto said edge feature of said layer of said first material; applying a layer of a third material onto said layer of said second material; removing a portion of said layer of said third material; removing a portion of said layer of said second material to define a pore in said layer of said second material; applying a layer of a fourth material into said pore to define a conductive path in said layer of said second material; and planarizing the layer of the fourth material to leave the layer of the fourth material disposed only within the pore in said layer of said second material.
Claim 3
Dependent Claim
40 words
The method of claim 1 , wherein forming an edge feature in said layer of said first material comprises removing a portion of said layer of said first material to define an opening in said layer of said first material.
Claim 4
Dependent Claim
14 words
The method of claim 2 , wherein said opening extends to said substrate material.
Claim 5
Dependent Claim
37 words
The method of claim 1 , wherein removing a portion of said third material comprises: removing a portion of said layer of said third material to define a remaining portion of said layer of said third material.
Claim 6
Dependent Claim
52 words
The method of claim 4 , wherein removing a portion of said layer of said second material to define a pore in said layer of said second material comprises removing a portion of said layer of said second material not covered by said remaining portion of said layer of said third material.
Claim 7
Dependent Claim
19 words
The method of claim 5 , further comprising removing said remaining portion of said layer of said third material.
Claim 8
Dependent Claim
28 words
The method of claim 1 , wherein said layer of said fourth material is selected from the group consisting of Ti, TiN, and TiC x N y .
Claim 9
Dependent Claim
14 words
The method of claim 1 , wherein the first material comprises a dielectric material.
Claim 10
Dependent Claim
12 words
The method of claim 8 , wherein the dielectric material comprises TEOS.
Claim 11
Dependent Claim
14 words
The method of claim 1 , wherein the second material comprises a dielectric material.
Claim 12
Dependent Claim
13 words
The method of claim 10 , wherein the dielectric material comprises silicon nitride.
Claim 13
Dependent Claim
14 words
The method of claim 1 , wherein the third material comprises a semiconductive material.
Claim 14
Dependent Claim
12 words
The method of claim 12 , wherein the semiconductive material comprises polysilicon.
Claim 15
Dependent Claim
22 words
The method of claim 1 , wherein the fourth material comprises at least one of a metal and a metal organic material.
Claim 16
Dependent Claim
14 words
The method of claim 1 , wherein planarizing the fourth material comprises chemical-mechanical planarization.
Claim 17
Dependent Claim
13 words
The method of claim 1 , wherein the substrate comprises a conductive material.
Claim 18
Dependent Claim
15 words
The method of claim 1 , wherein the steps are performed in the recited order.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-01-07 | 2005-07-09 | 2006-01-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-01-07 | 2009-07-09 | 2010-01-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-01-07 | 2013-07-09 | 2014-01-08 | $7700.00 | Window Closed / Lapsed |