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US4823181A Expired / Lapsed US ⏱️ 0.0 years remaining

Programmable low impedance anti-fuse element

Assignee: Microsemi SoC Corp
•
Filing: 1986-05-09
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Granted: 1989-04-18
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Expires: 2006-05-09
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Abstract

Abstract An electrically programmable low impedance circuit element is disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The electrically programmable low impedance circuit element of the present invention includes a lower conductive electrode which may be formed of a metal or semiconductor material, an insulating layer, which, in a preferred embodiment includes a first layer of silicon dioxide, a second layer of silicon nitride and a third layer of silicon dioxide. An upper electrode formed of a metal or of a semiconductor material of the same conductivity type of the lower electrode or a sandwich of both completes the structure.

Inventors

  • 👤 Amr M. Mohsen
  • 👤 Esmat Z. Hamdy
  • 👤 John L. McCullum

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 20:37
CPC Classifications
H; H10; H10B; H10B20/00; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491

Claims Analysis

Total Claims: 36
Claim 1
Independent Claim 66 words
An electrically programmable semiconductor device comprising a plurality of elements each of which comprises a first electrode, a second electrode, a multilayer dielectric comprising at least two dielectric layers of different dielectric constant disposed between the first electrode and the second electrode, and wherein at least one element has a conductive filament passing through the multilayer dielectric ohmically connecting the first electrode to the second electrode.
Claim 2
Dependent Claim 66 words
An electrically programmable semiconductor device comprising a plurality of elements each of which comprises a first electrode, a second electrode, a multilayer dielectric comprising at least two dielectric layers of different dielectric constant disposed between the first electrode and the second electrode, and wherein at least one element has a conductive filament passing through the multilayer dielectric ohmically connecting the first electrode to the second electrode.
Claim 3
Dependent Claim 92 words
A plurality of electrically-programmable lowimpedance anti-fuse elements, each of said elements including: a semiconductor substrate, a first electrode comprising a heavily-doped region disposed within a selected portion of said substrate, an insulator covering said heavily-doped region, said insulator having a first layer of silicon dioxide, and a second layer of silicon nitride over said first layer, and a second electrode comprising a heavily-doped polysilicon layer over said insulating layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and said second electrode.
Claim 4
Dependent Claim 92 words
A plurality of electrically-programmable lowimpedance anti-fuse elements, each of said elements including: a semiconductor substrate, a first electrode comprising a heavily-doped region disposed within a selected portion of said substrate, an insulator covering said heavily-doped region, said insulator having a first layer of silicon dioxide, and a second layer of silicon nitride over said first layer, and a second electrode comprising a heavily-doped polysilicon layer over said insulating layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and said second electrode.
Claim 5
Dependent Claim 29 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 2, each of said elements further including a third layer of silicon dioxide over said second layer in said insulator.
Claim 6
Dependent Claim 31 words
The plurality of electrically-programmable, low-impedance anti-fuse elements of claim 2, wherein said substrate is P-type and said heavily-doped region and said heavily-doped polysilicon layer are N-type and are doped with arsenic.
Claim 7
Dependent Claim 42 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 4, wherein said heavily-doped region is doped to a concentration of from 1×10 19 to 1×10 21 atoms/cm 3 and said heavily-doped polysilicon region has a sheet resistance of from approximately 10-100 ohms/square.
Claim 8
Dependent Claim 55 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 3, wherein said first layer has a thickness in the range of from 20 to 50 Å, said second layer has a thickness in the range from 40 to 100 Å, and said third layer has a thickness in the range from 0 to 50 Å.
Claim 9
Dependent Claim 29 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 6, wherein said substrate is P type and said heavily-doped region and said heavily-doped polysilicon region are doped with arsenic.
Claim 10
Dependent Claim 44 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 7, wherein said heavily-doped region is doped to a concentration of from 1×10 19 to 1×10 21 atoms/cm 3 and said heavily-doped polysilicon region has a sheet resistance of from approximately 10 to 100 ohms/square.
Claim 11
Dependent Claim 115 words
A plurality of electrically-programmable low-impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode, including a heavily-doped polysilicon layer over said first insulator, and a metal silicide layer over said polysilicon layer, a second insulator over said metal silicide layer, said second insulator having a first layer of silicon dioxide and a second layer of silicon nitride over said first layer, a barrier metal layer over said second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least one of said elements further including a conductive filament in said second insulator electrically connecting said first electrode in second electrode.
Claim 12
Dependent Claim 115 words
A plurality of electrically-programmable low-impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode, including a heavily-doped polysilicon layer over said first insulator, and a metal silicide layer over said polysilicon layer, a second insulator over said metal silicide layer, said second insulator having a first layer of silicon dioxide and a second layer of silicon nitride over said first layer, a barrier metal layer over said second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least one of said elements further including a conductive filament in said second insulator electrically connecting said first electrode in second electrode.
Claim 13
Dependent Claim 25 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 9, wherein said polysilicon layer has a sheet resistance of from approximately 10 to 100 ohms/square.
Claim 14
Dependent Claim 31 words
The plurality of electrically-programmable low impedance anti-fuse elements of claim 9, each of said elements further including a third layer of silicon dioxide over said second layer in said second insulator.
Claim 15
Dependent Claim 18 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 11, wherein said polysilicon layer is doped with arsenic.
Claim 16
Dependent Claim 57 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 12, wherein said first layer of silicon dioxide has a thickness of from 10 to 50 Å said second layer of silicon nitride has a thickness of from 40 to 100 Å, and said third layer of silicon dioxide has a thickness of from 0 to 50 Å.
Claim 17
Dependent Claim 50 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 13, wherein said polysilicon layer has a thickness of between 500 to 10,000 Å, and said silicide layer has a thickness of from 100 to 5,000 Å, and wherein said barrier metal has a thickness of from 50 to 5,000 Å.
Claim 18
Dependent Claim 123 words
A plurality of electrically programmable low-impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode comprised of a metal layer over said first insulator and a layer of barrier metal over said metal layer, a metal silicide layer over said first electrode, a second insulator over said metal silicide layer, said second insulator having a first layer of silicon dioxide and a second layer of silicon nitride over said first layer, a barrier metal layer over second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and second electrode.
Claim 19
Dependent Claim 123 words
A plurality of electrically programmable low-impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode comprised of a metal layer over said first insulator and a layer of barrier metal over said metal layer, a metal silicide layer over said first electrode, a second insulator over said metal silicide layer, said second insulator having a first layer of silicon dioxide and a second layer of silicon nitride over said first layer, a barrier metal layer over second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and second electrode.
Claim 20
Dependent Claim 58 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 15, wherein said first electrode has a metal layer having a thickness of from 5,000 to 15,000 Åand a barrier metal layer having a thickness of from 50 to 5,000 5 Å, and a silicide layer over said first electrode having a thickness of from 100 to 5000 Å.
Claim 21
Dependent Claim 30 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 15, each of said elements further including a third layer of silicon dioxide over said second layer in said second insulator.
Claim 22
Dependent Claim 56 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 17, wherein said first layer of silicon dioxide has a thickness of from 20 to 50 Å, said second layer of silicon nitride has a thickness of from 40 to 100 Åand said third layer of silicon dioxide has a thickness of from 0 to 50 Å.
Claim 23
Dependent Claim 41 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 18, wherein said second electrode has a barrier metal layer having a thickness of between 50 to 5,000 Å, and a metal layer having a thickness of from 5,000 to 15,000 Å.
Claim 24
Dependent Claim 125 words
A plurality of electrically-programmable, low-impedance anti-fuse elements, each of said elements including: a semiconductor substrate, a first electrode comprising a heavily-doped region disposed within a selected portion of said substrate, an insulator covering said heavily-doped region, said insulator having a first layer of silicon dioxide, having a thickness in the range of approximately 20-45Å, a second layer of silicon nitride over said first layer having a thickness in the range of approximately 45-80↑, and a third layer of silicon dioxide having a thickness in the range of approximately 1-20Å, and, a second electrode comprising a heavily-doped polysilicon layer over said insulating layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and said second electrode.
Claim 25
Dependent Claim 125 words
A plurality of electrically-programmable, low-impedance anti-fuse elements, each of said elements including: a semiconductor substrate, a first electrode comprising a heavily-doped region disposed within a selected portion of said substrate, an insulator covering said heavily-doped region, said insulator having a first layer of silicon dioxide, having a thickness in the range of approximately 20-45Å, a second layer of silicon nitride over said first layer having a thickness in the range of approximately 45-80↑, and a third layer of silicon dioxide having a thickness in the range of approximately 1-20Å, and, a second electrode comprising a heavily-doped polysilicon layer over said insulating layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and said second electrode.
Claim 26
Dependent Claim 31 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 20, wherein said substrate is P-type and said heavily-doped region and said heavily-doped polysilicon layer are N-type and are doped with arsenic.
Claim 27
Dependent Claim 42 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 21, wherein said heavily-doped region is doped to a concentration of from 1×10 19 to 1×10 21 atoms/cm 3 and said heavily-doped polysilicon region has a sheet resistance of from approximately 10-100 ohms/square.
Claim 28
Dependent Claim 147 words
A plurality of electrically-programmable low-impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode, including a heavily-doped polysilicon layer over said first insulator, and a metal silicide layer over said polysilicon layer, a second insulator over said metal silicide layer, said insulator having a first layer of silicon dioxide, having a thickness in the range of approximately 20-45Å, a second layer of silicon nitride over said first layer having a thickness in the range of approximately 45-80Å, and a third layer of silicon dioxide having a thickness in the range of approximately 1-20Å, a barrier metal layer over said second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least of one said elements further including a conductive filament in said second insulator electrically connecting said first electrode in second electrode.
Claim 29
Dependent Claim 147 words
A plurality of electrically-programmable low-impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode, including a heavily-doped polysilicon layer over said first insulator, and a metal silicide layer over said polysilicon layer, a second insulator over said metal silicide layer, said insulator having a first layer of silicon dioxide, having a thickness in the range of approximately 20-45Å, a second layer of silicon nitride over said first layer having a thickness in the range of approximately 45-80Å, and a third layer of silicon dioxide having a thickness in the range of approximately 1-20Å, a barrier metal layer over said second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least of one said elements further including a conductive filament in said second insulator electrically connecting said first electrode in second electrode.
Claim 30
Dependent Claim 25 words
The plurality of electrically-programmable low-impedance anti-fuse elements of claim 23, wherein said polysilicon layer has a sheet resistance of from approximately 10 to 100 ohms/square.
Claim 31
Dependent Claim 19 words
The plurality of electrically-programmable low impedance anti-fuse elements of claim 23, wherein said polysilicon layer is doped with arsenic.
Claim 32
Dependent Claim 58 words
The plurality of electrically-programmable low impedance anti-fuse elements of claim 25, wherein said polysilicon layer has a thickness in the range of approximately 500 to 10,000Å, and said silicide layer has a thickness in the range of approximately from 100 to 5,000Å, and wherein said barrier metal has a thickness in the range of approximately 50 to 5,000Å.
Claim 33
Dependent Claim 155 words
A plurality of electrically-programmable low impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode comprised of a metal layer over said first insulator and a layer of barrier metal over said metal layer, a metal silicide layer over said first electrode, a second insulator over said metal silicide layer, said insulator having a first layer of silicon dioxide, having a thickness in the range of approximately 20-45Å, a second layer of silicon nitride over said first layer having a thickness in the range of approximately 45-80Å, and a third layer of silicon dioxide having a thickness in the range of approximately 1-20Å, a barrier metal layer over second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and second electrode.
Claim 34
Dependent Claim 155 words
A plurality of electrically-programmable low impedance anti-fuse elements disposed on a first insulator over a semiconductor substrate, each of said elements including: a first electrode comprised of a metal layer over said first insulator and a layer of barrier metal over said metal layer, a metal silicide layer over said first electrode, a second insulator over said metal silicide layer, said insulator having a first layer of silicon dioxide, having a thickness in the range of approximately 20-45Å, a second layer of silicon nitride over said first layer having a thickness in the range of approximately 45-80Å, and a third layer of silicon dioxide having a thickness in the range of approximately 1-20Å, a barrier metal layer over second insulator, and a second electrode comprised of a metal over said barrier metal layer, at least one of said elements further including a conductive filament in said insulator electrically connecting said first electrode and second electrode.
Claim 35
Dependent Claim 68 words
The plurality of electrically-programmable low impedance anti-fuse elements of claim 27, wherein said first electrode has a metal layer having a thickness in the range of from approximately 5,000 to 15,000Å and a barrier metal layer having a thickness in the range of from approximately 50 to 5,000Å, and a silicide layer over said first electrode having a thickness in the range of from approximately 100 to 5000Å.
Claim 36
Dependent Claim 48 words
The plurality of electrically programmable low-impedance anti-fuse elements of claim 27, wherein said second electrode has a barrier metal layer having a thickness in the range of from approximately 50 to 5,000Å, and a metal layer having a thickness in the range of from approximately 5,000 to 15,000Å.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-04-17 1992-10-17 1993-04-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-04-17 1996-10-17 1997-04-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-04-17 2000-10-17 2001-04-18 $7700.00 Window Closed / Lapsed

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