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US6127736A
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Microbump interconnect for semiconductor dice
Assignee: Micron Technology Inc
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Filing: 1998-07-31
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Granted: 2000-10-03
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Expires: 2018-07-31
Abstract
Abstract A method for forming an interconnect for making a temporary or permanent electrical connection to a semiconductor dice is provided. The interconnect includes a rigid substrate on which an insulating layer and a pattern of conductors are formed. A compliant layer is formed on the insulating layer of a material such as polyimide. Vias are formed in the compliant layer with metal contacts in electrical communication with the conductors. Microbumps are formed on the compliant layer in electrical communication with the contacts and are adapted to flex with the compliant layer. The interconnect can be used to provide a temporary electrical connection for testing bare semiconductor dice. Alternately the interconnect can be used for flip chip mounting dice for fabricating multi chip modules and other electronic devices.
Inventors
- 👤 Salman Akram
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 06:20
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/11; H05K1/111; H05K1/112; H05K1/113; H05K3/00; H05K3/40; H05K3/4007; H10; H10W; H10W70/00; H10W70/099; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W90/00; H10W90/701; H05K1/0271; H05K1/03; H05K1/0306; H05K2201/00; H05K2201/01; H05K2201/0104; H05K2201/0133; H05K2201/0137; H05K2201/0154; H05K2201/03; H05K2201/0332; H05K2201/0335; H05K2201/0347; H05K2201/0364; H05K2201/0367; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09472; H05K2201/095; H05K2201/09509; H05K2203/00; H05K2203/04; H05K2203/043; H05K3/10; H05K3/14; H05K3/143; H05K3/22; H05K3/28; H05K3/30; H05K3/32; H05K3/325; H05K3/34; H05K3/3465; H05K3/46; H05K3/4602; H05K3/4605; H05K3/4644; H05K3/4673; H05K3/4676; H10W70/65; H10W70/654; H10W70/655; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
136 words
An interconnect configured for use in a test apparatus for testing a semiconductor die having a plurality of contacts in a first pattern comprising: a substrate comprising an electrically insulating first layer; a plurality of conductors on the first layer; an electrically insulating second layer on the conductors comprising a compliant polymeric material; a plurality of vias through the second layer to the conductors having a second pattern matching the first pattern; and a plurality of microbumps on the second layer aligned with the vias and in electrical communication with the conductors, the microbumps substantially larger than the vias such that the microbumps are supported by the second layer and can flex with the second layer to make temporary electrical connections with the contacts on the die upon application of a force by the test apparatus.
Claim 2
Dependent Claim
136 words
An interconnect configured for use in a test apparatus for testing a semiconductor die having a plurality of contacts in a first pattern comprising: a substrate comprising an electrically insulating first layer; a plurality of conductors on the first layer; an electrically insulating second layer on the conductors comprising a compliant polymeric material; a plurality of vias through the second layer to the conductors having a second pattern matching the first pattern; and a plurality of microbumps on the second layer aligned with the vias and in electrical communication with the conductors, the microbumps substantially larger than the vias such that the microbumps are supported by the second layer and can flex with the second layer to make temporary electrical connections with the contacts on the die upon application of a force by the test apparatus.
Claim 3
Dependent Claim
23 words
The interconnect of claim 1 wherein the substrate comprises a material selected from the group consisting of silicon, silicon-on-glass, silicon-on-sapphire, germanium, and ceramic.
Claim 4
Dependent Claim
22 words
The interconnect of claim 1 wherein the second layer comprises polyimide having a thickness of from about 0.5 μm to 15 μm.
Claim 5
Dependent Claim
16 words
The interconnect of claim 1 wherein the second layer comprises a tape applied to the substrate.
Claim 6
Dependent Claim
19 words
The interconnect of claim 1 wherein the contacts comprise bond pads and the microbumps have a generally hemispherical shape.
Claim 7
Dependent Claim
19 words
The interconnect of claim 1 wherein the microbumps have a diameter of from about 15 μm to 10 μm.
Claim 8
Dependent Claim
15 words
The interconnect of claim 1 wherein the vias comprise second contacts bonded to the microbumps.
Claim 9
Dependent Claim
131 words
A multi chip module comprising: a substrate comprising an electrically insulating first layer; a plurality of conductors on the first layer; an electrically insulating second layer on the conductors comprising a compliant polymeric material; a plurality of vias through the second layer to the conductors having a first diameter and a first pattern; a plurality of microbumps in the vias in electrical communication with the conductors, the microbumps having a second diameter substantially larger than the first diameter such that the microbumps are supported by the second layer and can flex with the second layer upon application of an external force; and at least one semiconductor die flip chip mounted to the substrate comprising a plurality of contacts in a second pattern matching the first pattern and bonded to the microbumps.
Claim 10
Dependent Claim
131 words
A multi chip module comprising: a substrate comprising an electrically insulating first layer; a plurality of conductors on the first layer; an electrically insulating second layer on the conductors comprising a compliant polymeric material; a plurality of vias through the second layer to the conductors having a first diameter and a first pattern; a plurality of microbumps in the vias in electrical communication with the conductors, the microbumps having a second diameter substantially larger than the first diameter such that the microbumps are supported by the second layer and can flex with the second layer upon application of an external force; and at least one semiconductor die flip chip mounted to the substrate comprising a plurality of contacts in a second pattern matching the first pattern and bonded to the microbumps.
Claim 11
Dependent Claim
25 words
The multi chip module of claim 8 wherein the substrate comprises a material selected from the group consisting of silicon, silicon-on-glass, silicon-on-sapphire, germanium, and ceramic.
Claim 12
Dependent Claim
24 words
The multi chip module of claim 8 wherein the second layer comprises polyimide having a thickness of from about 0.5 μm to 15 μm.
Claim 13
Dependent Claim
21 words
The multi chip module of claim 8 wherein the contacts comprise bond pads and the microbumps have a Generally hemispherical shape.
Claim 14
Dependent Claim
19 words
The multi chip module of claim 8 wherein the microbumps comprise solder and the vias comprise solder wettable contacts.
Claim 15
Dependent Claim
18 words
The multi chip module of claim 8 wherein the second layer comprises a tape applied to the substrate.
Claim 16
Dependent Claim
123 words
An interconnect configured for use in a test apparatus for testing a semiconductor die having a plurality of contacts in a first pattern comprising: a substrate; a plurality of conductors on the substrate; an electrically insulating layer on the conductors comprising a compliant polymeric material; a plurality of vias through the layer to the conductors having a second pattern matching the first pattern; and a plurality of microbumps supported by the layer and aligned with the vias in electrical communication with the conductors, the microbumps configured to make temporary electrical connections with the contacts on the die, and to flex with the layer during application of an external force by the test apparatus to accommodate dimensional variations in the contacts or the microbumps.
Claim 17
Dependent Claim
123 words
An interconnect configured for use in a test apparatus for testing a semiconductor die having a plurality of contacts in a first pattern comprising: a substrate; a plurality of conductors on the substrate; an electrically insulating layer on the conductors comprising a compliant polymeric material; a plurality of vias through the layer to the conductors having a second pattern matching the first pattern; and a plurality of microbumps supported by the layer and aligned with the vias in electrical communication with the conductors, the microbumps configured to make temporary electrical connections with the contacts on the die, and to flex with the layer during application of an external force by the test apparatus to accommodate dimensional variations in the contacts or the microbumps.
Claim 18
Dependent Claim
15 words
The interconnect of claim 14 wherein the compliant polymeric material comprises a layer of tape.
Claim 19
Dependent Claim
22 words
The interconnect of claim 14 wherein the contacts on the die comprise bond pads and the microbumps have a generally hemispherical shape.
Claim 20
Dependent Claim
19 words
The interconnect of claim 14 wherein the microbumps have a diameter of from about 15 μm to 100 μm.
Claim 21
Dependent Claim
20 words
The interconnect of claim 14 wherein the polymeric material has a thickness of from about 0.5 μm to 15 μm.
Claim 22
Dependent Claim
152 words
An interconnect configured for use in a test apparatus for testing a semiconductor die having a plurality of contacts in a first pattern comprising: a substrate; a plurality of conductors on the substrate; an electrically insulating compliant layer on the conductors comprising a polymeric material; a plurality of vias through the compliant layer to the conductors, the vias having a first diameter and a second pattern matching the first pattern; and a plurality of microbumps on the compliant layer configured to make temporary electrical connections with the contacts on the die, the microbumps aligned with the vias in electrical communication with the conductors, the microbumps having a second diameter substantially larger than the first diameter such that the microbumps can flex with the compliant layer during application of an external force by the test apparatus to accommodate dimensional variations in the contacts or the microbumps during making of the temporary electrical connections.
Claim 23
Dependent Claim
152 words
An interconnect configured for use in a test apparatus for testing a semiconductor die having a plurality of contacts in a first pattern comprising: a substrate; a plurality of conductors on the substrate; an electrically insulating compliant layer on the conductors comprising a polymeric material; a plurality of vias through the compliant layer to the conductors, the vias having a first diameter and a second pattern matching the first pattern; and a plurality of microbumps on the compliant layer configured to make temporary electrical connections with the contacts on the die, the microbumps aligned with the vias in electrical communication with the conductors, the microbumps having a second diameter substantially larger than the first diameter such that the microbumps can flex with the compliant layer during application of an external force by the test apparatus to accommodate dimensional variations in the contacts or the microbumps during making of the temporary electrical connections.
Claim 24
Dependent Claim
11 words
The interconnect of claim 19 wherein the compliant layer comprises polyimide.
Claim 25
Dependent Claim
12 words
The interconnect of claim 19 wherein the compliant layer comprises polyimide tape.
Claim 26
Dependent Claim
118 words
A multi chip module comprising: a substrate; at least one semiconductor die flip chip mounted to the substrate comprising a plurality of contacts in a first pattern; a plurality of conductors on the substrate; an electrically insulating compliant layer on the conductors comprising a polymeric material; a plurality of vias through the compliant layer to the conductors having a second pattern matching the first pattern; a plurality of microbumps supported by the compliant layer and aligned with the vias in electrical communication with the conductors, the microbumps bonded to the contacts on the die, and configured to flex with the compliant layer upon application of an external force to accommodate dimensional variations in the contacts or the microbumps.
Claim 27
Dependent Claim
118 words
A multi chip module comprising: a substrate; at least one semiconductor die flip chip mounted to the substrate comprising a plurality of contacts in a first pattern; a plurality of conductors on the substrate; an electrically insulating compliant layer on the conductors comprising a polymeric material; a plurality of vias through the compliant layer to the conductors having a second pattern matching the first pattern; a plurality of microbumps supported by the compliant layer and aligned with the vias in electrical communication with the conductors, the microbumps bonded to the contacts on the die, and configured to flex with the compliant layer upon application of an external force to accommodate dimensional variations in the contacts or the microbumps.
Claim 28
Dependent Claim
27 words
The multi chip module of claim 22 wherein the vias have a first diameter and the microbumps have a second diameter substantially larger than the first diameter.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-03 | 2004-04-03 | 2004-10-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-03 | 2008-04-03 | 2008-10-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-03 | 2012-04-03 | 2012-10-03 | $7700.00 | Window Closed / Lapsed |