US5859443A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Semiconductor Energy Laboratory Co Ltd
•
Filing: 1995-06-06
•
Granted: 1999-01-12
•
Expires: 2015-06-06
Abstract
Abstract A semiconductor device which has a non-single crystal semiconductor layer formed on a substrate and in which the non-single crystal semiconductor layer is composed of a first semiconductor region formed primarily of non-single crystal semiconductor and a second semi-conductor region formed primarily of semi-amorphous semiconductor. The second semi-conductor region has a higher degree of conductivity than the first semiconductor region so that a semi-conductor element may be formed.
Inventors
- 👤 Shunpei Yamazaki
- 👤 Yujiro Nagata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 10:44
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/24; H10P14/2922; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P14/3444
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
77 words
An insulated gate field effect transistor formed on an insulating surface, having at least a channel region, a gate insulating layer in contact with said channel region and a gate electrode insulated from said channel region by said gate insulating layer, said channel region comprising a semiconductor material having crystallinity, wherein said semiconductor material comprises silicon doped with hydrogen and a quadrivalent element, and a concentration of said quadrivalent element is not higher than 10 mol %.
Claim 2
Dependent Claim
77 words
An insulated gate field effect transistor formed on an insulating surface, having at least a channel region, a gate insulating layer in contact with said channel region and a gate electrode insulated from said channel region by said gate insulating layer, said channel region comprising a semiconductor material having crystallinity, wherein said semiconductor material comprises silicon doped with hydrogen and a quadrivalent element, and a concentration of said quadrivalent element is not higher than 10 mol %.
Claim 3
Dependent Claim
14 words
The transistor of claim 1 wherein said semiconductor material has an intrinsic conductivity type.
Claim 4
Dependent Claim
13 words
The transistor of claim 1 wherein said semiconductor material has a conductivity type.
Claim 5
Dependent Claim
122 words
An insulated gate field effect transistor formed on an insulating surface, having at least a channel region, a gate insulating layer in contact with said channel region and a gate electrode insulated from said channel region by said gate insulating layer, said channel region comprising a non-single crystalline semiconductor material comprising (a) a semiconductor selected from the group consisting of silicon, germanium and a combination thereof, (b) a recombination center neutralizer containing hydrogen, and (c) a quadrivalent element selected from the group consisting of Sn and Pb wherein said semiconductor material has crystallinity and a concentration of said recombination center neutralizer is not higher than 5 mol %, and a concentration of said quadrivalent element is not higher than 10 mol %.
Claim 6
Dependent Claim
122 words
An insulated gate field effect transistor formed on an insulating surface, having at least a channel region, a gate insulating layer in contact with said channel region and a gate electrode insulated from said channel region by said gate insulating layer, said channel region comprising a non-single crystalline semiconductor material comprising (a) a semiconductor selected from the group consisting of silicon, germanium and a combination thereof, (b) a recombination center neutralizer containing hydrogen, and (c) a quadrivalent element selected from the group consisting of Sn and Pb wherein said semiconductor material has crystallinity and a concentration of said recombination center neutralizer is not higher than 5 mol %, and a concentration of said quadrivalent element is not higher than 10 mol %.
Claim 7
Dependent Claim
14 words
The transistor of claim 4 wherein said semiconductor material has an intrinsic conductivity type.
Claim 8
Dependent Claim
17 words
The transistor of claim 4 wherein said semiconductor material has a p-type or an n-type conductivity type.
Claim 9
Dependent Claim
82 words
An insulated gate field effect transistor formed on an insulating surface, having at least a channel region, a gate insulating layer in contact with said channel region and a gate electrode insulated from said gate insulating layer, said channel region comprising a semiconductor material having crystallinity, wherein said semiconductor material comprises silicon and germanium doped with a recombination center neutralizer selected from the group consisting of hydrogen and fluorine, and a concentration of said germanium is not higher than 10 mol %.
Claim 10
Dependent Claim
82 words
An insulated gate field effect transistor formed on an insulating surface, having at least a channel region, a gate insulating layer in contact with said channel region and a gate electrode insulated from said gate insulating layer, said channel region comprising a semiconductor material having crystallinity, wherein said semiconductor material comprises silicon and germanium doped with a recombination center neutralizer selected from the group consisting of hydrogen and fluorine, and a concentration of said germanium is not higher than 10 mol %.
Claim 11
Dependent Claim
14 words
The transistor of claim 7 wherein said semiconductor material has an intrinsic conductivity type.
Claim 12
Dependent Claim
20 words
The transistor of claim 7 wherein a concentration of said recombination center neutralizer is not higher than 5 mol %.
Claim 13
Dependent Claim
27 words
The transistor of claim 1, 4 or 7 wherein said insulating surface is a surface of a glass plate, a ceramic plate or a silicon oxide film.
Claim 14
Dependent Claim
27 words
An insulated gate field effect transistor according to claim 1 wherein said quadrivalent element is contained at a concentration from 0.1 mol % to 10 mol %.
Claim 15
Dependent Claim
27 words
An insulated gate field effect transistor according to claim 4 wherein said quadrivalent element is contained at a concentration from 0.1 mol % to 10 mol %.
Claim 16
Dependent Claim
17 words
An insulated gate field effect transistor according to claim 1 wherein said gate electrode comprises doped silicon.
Claim 17
Dependent Claim
17 words
An insulated gate field effect transistor according to claim 4 wherein said gate electrode comprises doped silicon.
Claim 18
Dependent Claim
17 words
An insulated gate field effect transistor according to claim 7 wherein said gate electrode comprises doped silicon.
Claim 19
Dependent Claim
25 words
An insulated gate field effect transistor according to claim 1 wherein said channel region is not doped with an N or P type conductivity impurity.
Claim 20
Dependent Claim
25 words
An insulated gate field effect transistor according to claim 4 wherein said channel region is not doped with an N or P type conductivity impurity.
Claim 21
Dependent Claim
25 words
An insulated gate field effect transistor according to claim 7 wherein said channel region is not doped with an N or P type conductivity impurity.
Claim 22
Dependent Claim
18 words
An insulated gate field effect transistor according to claim 1 wherein said channel region has a lattice strain.
Claim 23
Dependent Claim
127 words
An insulated gate field effect transistor comprising: a semiconductor layer comprising silicon having crystallinity formed on an insulating surface; source and drain regions formed within said semiconductor layer, said source and drain regions having one of N type or P type conductivity; a channel region formed within said semiconductor layer between said source and drain regions, said channel region doped with a dopant impurity having a conductivity type opposite to the conductivity type of said source and drain regions; a gate insulating film adjacent to said channel region; and a gate electrode adjacent to said gate insulating film, wherein said semiconductor layer is doped with a dangling bond neutralizer and a quadrivalent element, and a concentration of said quadrivalent element is not higher than 10 mol %.
Claim 24
Dependent Claim
127 words
An insulated gate field effect transistor comprising: a semiconductor layer comprising silicon having crystallinity formed on an insulating surface; source and drain regions formed within said semiconductor layer, said source and drain regions having one of N type or P type conductivity; a channel region formed within said semiconductor layer between said source and drain regions, said channel region doped with a dopant impurity having a conductivity type opposite to the conductivity type of said source and drain regions; a gate insulating film adjacent to said channel region; and a gate electrode adjacent to said gate insulating film, wherein said semiconductor layer is doped with a dangling bond neutralizer and a quadrivalent element, and a concentration of said quadrivalent element is not higher than 10 mol %.
Claim 25
Dependent Claim
24 words
An insulated gate field effect transistor according to claim 20 wherein said quadrivalent element is selected from the group consisting of Pb and Sn.
Claim 26
Dependent Claim
16 words
An insulated gate field effect transistor according to claim 20 wherein said quadrivalent element is germanium.
Claim 27
Dependent Claim
20 words
An insulated gate field effect transistor according to claim 20 wherein said gate electrode is located over said channel region.
Claim 28
Dependent Claim
124 words
An insulated gate field effect transistor comprising: a semiconductor layer comprising silicon and germanium having crystallinity formed on an insulating surface; source and drain regions formed within said semiconductor layer, said source and drain regions having one of N type or P type conductivity; a channel region formed within said semiconductor layer between said source and drain regions, said channel region doped with a dopant impurity having a conductivity type opposite to the conductivity type of said source and drain regions; a gate insulating film adjacent to said channel region; and a gate electrode adjacent to said gate insulating film, wherein said semiconductor layer is doped with a dangling bond neutralizer, and a concentration of said germanium is not higher than 10 mol %.
Claim 29
Dependent Claim
124 words
An insulated gate field effect transistor comprising: a semiconductor layer comprising silicon and germanium having crystallinity formed on an insulating surface; source and drain regions formed within said semiconductor layer, said source and drain regions having one of N type or P type conductivity; a channel region formed within said semiconductor layer between said source and drain regions, said channel region doped with a dopant impurity having a conductivity type opposite to the conductivity type of said source and drain regions; a gate insulating film adjacent to said channel region; and a gate electrode adjacent to said gate insulating film, wherein said semiconductor layer is doped with a dangling bond neutralizer, and a concentration of said germanium is not higher than 10 mol %.
Claim 30
Dependent Claim
20 words
An insulated gate field effect transistor according to claim 24 wherein said gate electrode is located over said channel region.
Claim 31
Dependent Claim
21 words
An insulated gate field effect transistor according to claim 1 wherein said quadrivalent element is contained in said semiconductor material uniformly.
Claim 32
Dependent Claim
20 words
An insulated gate field effect transistor according to claim 7 wherein said germanium is contained in said semiconductor material uniformly.
Claim 33
Dependent Claim
21 words
An insulated gate field effect transistor according to claim 20 wherein said quadrivalent element is contained in said semiconductor layer uniformly.
Claim 34
Dependent Claim
20 words
An insulated gate field effect transistor according to claim 24 wherein said germanium is contained in said semiconductor layer uniformly.
Claim 35
Dependent Claim
24 words
An insulated gate field effect transistor according to claim 1 wherein said quadrivalent element is selected from the group consisting of Pb and Sn.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-01-11 | 2002-07-13 | 2003-01-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-01-11 | 2006-07-13 | 2007-01-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-01-11 | 2010-07-13 | 2011-01-12 | $7700.00 | Window Closed / Lapsed |