US5801076A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making non-volatile memory device having a floating gate with enhanced charge retention
Assignee: Cypress Semiconductor Corp
•
Filing: 1995-02-21
•
Granted: 1998-09-01
•
Expires: 2015-02-21
Abstract
Abstract A non-volatile memory device is fabricated having enhanced charge retention capability. Enhanced charge retention is achieved upon the floating gate of the non-volatile memory device. The floating gate maybe can configured as a stacked or non-stacked pair of polysilicon conductors. In either instance, negative charge programmed upon the floating gate is retained by reducing the presence of positively charged atoms within dielectrics overlying the floating gate conductor. Moreover, diffusion avenues of the positively charged hydrogen are reduced by maintaining a prevalence of relatively strong bond locations within the overlying dielectric layers. Thus, origination of positively charged atoms, such as hydrogen, from those bonds are substantially prevented by processing the hydrogen-containing dielectrics at relatively low temperatures and further processing any subsequent dielectrics and/or conductors overlying the floating gate at relatively low temperatures. Suitable processing temperatures (dielectric deposition and metal sintering temperatures) are temperatures less than 380° C.
Inventors
- 👤 Said N. Ghneim
- 👤 H. Jim Fulford, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:29
CPC Classifications
H; H10; H10B; H10B69/00; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/681; H10D30/683; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10W; H10W74/00; H10W74/10; H10W74/131; H10W74/137; Y; Y10; Y10S; Y10S438/00; Y10S438/91
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
77 words
A method for fabricating a memory device having a floating gate, comprising the steps of: providing a semiconductor substrate upon which a tunnel oxide is formed; depositing a floating gate upon said tunnel oxide; and forming at an elevational level above said floating gate a hydrogen-containing dielectric having bonded hydrogen which remains in its bonded location during formation of said hydrogen-containing dielectric and further remains in its bonded location after electrons are injected upon said floating gate.
Claim 2
Independent Claim
77 words
A method for fabricating a memory device having a floating gate, comprising the steps of: providing a semiconductor substrate upon which a tunnel oxide is formed; depositing a floating gate upon said tunnel oxide; and forming at an elevational level above said floating gate a hydrogen-containing dielectric having bonded hydrogen which remains in its bonded location during formation of said hydrogen-containing dielectric and further remains in its bonded location after electrons are injected upon said floating gate.
Claim 3
Dependent Claim
28 words
The method as recited in claim 1, further comprising applying heat at a temperature less than 380° C. to said semiconductor substrate during and after said forming step.
Claim 4
Dependent Claim
21 words
The method as recited in claim 1, wherein said forming step comprises depositing said hydrogen-containing dielectric layer upon said floating gate.
Claim 5
Dependent Claim
28 words
The method as recited in claim 1, wherein said forming step comprises depositing said hydrogen-containing dielectric layer upon a control gate which is spaced above said floating gate.
Claim 6
Dependent Claim
24 words
The method as recited in claim 4, wherein said control gate is connected to a word line of an array of non-volatile memory cells.
Claim 7
Dependent Claim
31 words
The method as recited in claim 1, wherein said forming step comprises depositing said hydrogen-containing dielectric layer a spaced distance above a control gate which is spaced above said floating gate.
Claim 8
Dependent Claim
24 words
The method as recited in claim 6, wherein said control gate is connected to a word line of an array of non-volatile memory cells.
Claim 9
Dependent Claim
25 words
The method as recited in claim 1, wherein said hydrogen-containing dielectric layer is a layer of oxide, spin on glass (SOG), or borophosphosilicate glass (BPSG).
Claim 10
Dependent Claim
22 words
The method as recited in claim 8, wherein said oxide layer is deposited from a plasma enhanced chemical vapor deposition (PECVD) chamber.
Claim 11
Dependent Claim
45 words
The method as recited in claim 1, further comprising subsequently forming at a temperature less than 380° C. a combination of dielectric and conductive layers upon said hydrogen-containing dielectric, wherein the uppermost layer of said combination of dielectric and conductor layers comprises a passivation layer.
Claim 12
Dependent Claim
20 words
The method as recited in claim 10, wherein said passivation layer is a final layer deposited upon the memory device.
Claim 13
Dependent Claim
24 words
The method as recited in claim 10, wherein said passivation layer comprises a material selected form the group consisting of oxynitride, nitride and oxide.
Claim 14
Dependent Claim
26 words
The method as recited in claim 1, wherein said subsequently forming said combination of dielectric and conductive layers comprises applying heat for alloying said conductive layer.
Claim 15
Independent Claim
94 words
A method for fabricating a memory device having a floating gate, comprising the steps of: providing a semiconductor substrate upon which a tunnel oxide is formed; depositing a floating gate upon said tunnel oxide, and depositing an intermediate oxide upon said floating gate; depositing a control gate upon said intermediate oxide; and forming at an elevational level above said control gate a hydrogen-containing dielectric having bonded hydrogen which remains in its bonded location during formation of said hydrogen-containing dielectric and further remains in its bonded location after electrons are injected upon said floating gate.
Claim 16
Independent Claim
94 words
A method for fabricating a memory device having a floating gate, comprising the steps of: providing a semiconductor substrate upon which a tunnel oxide is formed; depositing a floating gate upon said tunnel oxide, and depositing an intermediate oxide upon said floating gate; depositing a control gate upon said intermediate oxide; and forming at an elevational level above said control gate a hydrogen-containing dielectric having bonded hydrogen which remains in its bonded location during formation of said hydrogen-containing dielectric and further remains in its bonded location after electrons are injected upon said floating gate.
Claim 17
Dependent Claim
28 words
The method as recited in claim 14, further comprising applying heat at a temperature less than 380° C. to said semiconductor substrate during and after said forming step.
Claim 18
Dependent Claim
19 words
The method as recited in claim 14, wherein said bonded hydrogen is formed at temperatures less than 380° C.
Claim 19
Dependent Claim
19 words
The method as recited in claim 14, wherein said bonded hydrogen is formed at temperatures less than 350° C.
Claim 20
Dependent Claim
20 words
The method as recited in claim 14, wherein said dielectric comprises oxide, spin on glass (SOG), or borophosphosilicate glass (BPSG).
Claim 21
Dependent Claim
37 words
The method as recited in claim 14, further comprising subsequently forming at a temperature less than 380° C. a combination of dielectric and conductive layers upon said hydrogen-containing dielectric, wherein the uppermost layer is a passivation layer.
Claim 22
Dependent Claim
21 words
The method as recited in claim 19, wherein said passivation layer is a final layer deposited upon the non-volatile memory device.
Claim 23
Dependent Claim
19 words
The method as recited in claim 1, wherein said bonded hydrogen is formed at temperatures less than 380° C.
Claim 24
Dependent Claim
19 words
The method as recited in claim 1, wherein said bonded hydrogen is formed at temperatures less than 350° C.
Claim 25
Dependent Claim
44 words
The method as recited in claim 14, wherein said forming step comprises a step selected from the group of steps consisting of depositing the hydrogen-containing dielectric layer upon the control gate and depositing the hydrogen-containing dielectric layer a spaced distance above the control gate.
Claim 26
Dependent Claim
24 words
The method as recited in claim 23, wherein said control gate is connected to a word line of an array of non-volatile memory cells.
Claim 27
Dependent Claim
22 words
The method as recited in claim 18, wherein said oxide layer is deposited from a plasma enhanced chemical vapor deposition (PECVD) chamber.
Claim 28
Dependent Claim
24 words
The method as recited in claim 19, wherein said passivation layer comprises a material selected form the group consisting of oxynitride, nitride and oxide.
Claim 29
Dependent Claim
26 words
The method as recited in claim 14, wherein said subsequently forming said combination of dielectric and conductive layers comprises applying heat for alloying said conductive layer.
References Cited (Backward Citations)
US4581622A
Cited
US4422161A
Cited
EP0196806A1
Cited
US5149666A
Cited
US5101250A
Cited
US4958321A
Cited
US4999812A
Cited
US5120672A
Cited
US5070032A
Cited
EP0409107A2
Cited
US5077691A
Cited
US5147811A
Cited
EP0461764A2
Cited
US5151375A
Cited
EP0464432A2
Cited
US5279982A
Cited
US5120671A
Cited
US5208175A
Cited
US5364664A
Cited
EP0498604A1
Cited
US5279981A
Cited
EP0552531A1
Cited
EP0573169A1
Cited
US5284786A
Cited
JPH06132542A
Cited
US5335198A
Cited
US5462898A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-31 | 2002-03-02 | 2002-09-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-31 | 2006-03-02 | 2006-09-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-31 | 2010-03-02 | 2010-09-01 | $7700.00 | Window Closed / Lapsed |