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US5208175A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making a nonvolatile semiconductor memory device

Assignee: Samsung Electronics Co Ltd
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Filing: 1991-04-26
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Granted: 1993-05-04
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Expires: 2011-04-26
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Abstract

Abstract A nonvolatile semiconductor memory device and the method thereof is disclosed. The nonvolatile semiconductor memory device comprises a first conductive type semiconductor substrate, a field oxide film formed on the semiconductor substrate to define an active region, a source region and a drain region which are separated by a channel region near the surface of semiconductor substrate of the active region and diffused with an impurity of the opposite conductive type to the semiconductor substrate, a thin gate insulating film formed on the channel region and partially on the source and drain regions, a first conductive layer formed on the gate insulating film and provided as a floating electrode for accumulating charges, an interlayer insulating film formed on the first conductive layer, and a second conductive layer formed on the interlayer insulating film and provided as a control electrode. In the nonvolatile semiconductor memory device, cell characteristics can be greatly improved by thickening the exposed edge of the gate insulating film damaged during fabrication by the reoxidation process, after the formation of the patterns of the floating gate electrode and the control gate electrode.

Inventors

  • 👤 Jeong-Hyeok Choi
  • 👤 Geon-su Kim
  • 👤 Yun-seong Sin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 22:21
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01354; H10D30/60; H10D30/68; H10D30/681; H10D30/683; H10D30/6891; H10D64/031; H10D64/035; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516; H10P; H10P32/00; H10P32/30; H10P32/302; H10P50/00

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 299 words
A method for manufacturing a nonvolatile semiconductor memory device comprising the steps of: forming a field oxide film to define an active region on a semiconductor substrate of a first conductive type; thermally growing a gate oxide film on the surface of said semiconductor substrate of said active region; depositing a first polycrystalline silicon layer doped with an impurity and forming a pattern of said first deposited polycrystalline silicon layer; covering said first patterned polycrystalline silicon layer with an interlayer insulating film; depositing a second polycrystalline silicon layer on said interlayer insulating film; forming a pattern of a first polycrystalline silicon layer provided as a floating electrode for accumulating charges and a pattern of said second polycrystalline silicon layer provided as a control electrode overlapping said floating electrode, by using a photolithography process to sequentially etch the stacked layers of the second polycrystalline silicone layer, the interlayer insulating film, and the first polycrystalline silicon layer; growing a thermal oxide film at least two times as thick as that of said gate oxide film on the whole surface of the above resultant structure, after the step of forming said patterns; thinning the portion of said thermal oxide film formed on the surface of said active region by an anisotropically etching process, after the step of growing said thermal oxide film; and forming a source region and a drain region by ion-implanting impurities of the opposite conductive type to the substrate near the surface of the semiconductor substrate of the active region through said thermal oxide film and then activating the implanted impurities; whereby the edge portion of said gate oxide film, which is thicker than the other portions of said gate oxide film, is formed by a bird's beak extending toward said gate oxide film from said thermal oxide film.
Claim 2
Independent Claim 299 words
A method for manufacturing a nonvolatile semiconductor memory device comprising the steps of: forming a field oxide film to define an active region on a semiconductor substrate of a first conductive type; thermally growing a gate oxide film on the surface of said semiconductor substrate of said active region; depositing a first polycrystalline silicon layer doped with an impurity and forming a pattern of said first deposited polycrystalline silicon layer; covering said first patterned polycrystalline silicon layer with an interlayer insulating film; depositing a second polycrystalline silicon layer on said interlayer insulating film; forming a pattern of a first polycrystalline silicon layer provided as a floating electrode for accumulating charges and a pattern of said second polycrystalline silicon layer provided as a control electrode overlapping said floating electrode, by using a photolithography process to sequentially etch the stacked layers of the second polycrystalline silicone layer, the interlayer insulating film, and the first polycrystalline silicon layer; growing a thermal oxide film at least two times as thick as that of said gate oxide film on the whole surface of the above resultant structure, after the step of forming said patterns; thinning the portion of said thermal oxide film formed on the surface of said active region by an anisotropically etching process, after the step of growing said thermal oxide film; and forming a source region and a drain region by ion-implanting impurities of the opposite conductive type to the substrate near the surface of the semiconductor substrate of the active region through said thermal oxide film and then activating the implanted impurities; whereby the edge portion of said gate oxide film, which is thicker than the other portions of said gate oxide film, is formed by a bird's beak extending toward said gate oxide film from said thermal oxide film.
Claim 3
Dependent Claim 48 words
A method for manufacturing a nonvolatile semiconductor memory device as claimed in claim 1, wherein in the step of growing said thermal oxide film, a wet oxide oxygen atmosphere is held for approximately 15 minutes, thereby growing the thermal oxide film to a thickness of approximately 1,000 Å.
Claim 4
Dependent Claim 34 words
A method for manufacturing a nonvolatile semiconductor memory device as claimed in claim 1, wherein said interlayer insulating film is an oxide film, a nitride film, or a stacked film of oxide and nitride.
Claim 5
Independent Claim 153 words
A method for manufacturing a nonvolatile semiconductor memory device comprising the steps of: growing a gate oxide film on the an active region of a semiconductor substrate of a first conductivity type; depositing a first polycrystalline silicon layer on said gate oxide film; covering said first polycrystalline silicon layer with an interlayer insulating layer; depositing a second polycrystalline silicon layer on said interlayer insulating film; forming a pattern of said first polycrystalline silicon layer as a floating electrode for accumulating charges and a pattern of said second polycrystalline silicon layer provided as a control electrode overlapping said floating electrode; growing a thermal oxide film on the whole surface of the above resultant structure; and thinning a portion of said thermal oxide film formed on said active region after the step of growing said thermal oxide film; introducing a seconductivity type impurity through the thinned thermal oxide film to form source and drain regions.
Claim 6
Independent Claim 153 words
A method for manufacturing a nonvolatile semiconductor memory device comprising the steps of: growing a gate oxide film on the an active region of a semiconductor substrate of a first conductivity type; depositing a first polycrystalline silicon layer on said gate oxide film; covering said first polycrystalline silicon layer with an interlayer insulating layer; depositing a second polycrystalline silicon layer on said interlayer insulating film; forming a pattern of said first polycrystalline silicon layer as a floating electrode for accumulating charges and a pattern of said second polycrystalline silicon layer provided as a control electrode overlapping said floating electrode; growing a thermal oxide film on the whole surface of the above resultant structure; and thinning a portion of said thermal oxide film formed on said active region after the step of growing said thermal oxide film; introducing a seconductivity type impurity through the thinned thermal oxide film to form source and drain regions.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-05-03 1996-11-02 1997-05-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-05-03 2000-11-02 2001-05-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-05-03 2004-11-02 2005-05-04 $7700.00 Window Closed / Lapsed

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