US5619066A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Memory for an electronic token
Assignee: Maxim Integrated Products Inc
•
Filing: 1994-08-31
•
Granted: 1997-04-08
•
Expires: 2014-08-31
Abstract
Abstract A serial-port memory is positioned in a substantially token-shaped body. The substantially token-shaped body has a perimeter and a flange extending from a portion of the perimeter. The serial-port memory comprises a serial port, a scratchpad memory coupled to the serial port, a second memory coupled to the scratchpad memory; and control logic coupled to the serial port and the scratchpad and second memories. The control logic transfers information from the scratchpad memory to the second memory as a block pursuant to a block transfer command received at the serial port. The electronic token has a first electrically conductive surface and a second electrically conductive surface that combines to create a hollow cavity and the serial port, scratchpad memory, second memory, and control logic positioned inside the hollow cavity, the first conductive surface and the second conductive surface can be electrically coupled to transmit electrical signals generated by the serial port, scratchpad memory, second memory, and control logic and to receive externally generated electrical signals. The first electrically conductive surface and the second electrically conductive surface are preferably planar. The control logic includes a cyclic redundancy check generator. Third and fourth memories can be coupled to the scratchpad memory, wherein the control logic transfers information as a block from the scratchpad memory to one of the second, third, and fourth memories pursuant to a block transfer command received at the serial port.
Inventors
- 👤 Stephen M. Curry
- 👤 Michael L. Bolan
- 👤 Kevin E. Deierling
- 👤 II William L. Payne
- 👤 Hal Kurkowski
- 👤 Donald R. Dias
- 👤 Gary V. Zanders
- 👤 Robert D. Lee
- 👤 Guenther H. Lehmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 20:35
CPC Classifications
H; H10; H10W; H10W42/00; G; G01; G01K; G01K1/00; G01K1/02; G01K1/028; G01K3/00; G01K3/08; G01K3/10; G01K7/00; G01K7/16; G01K7/22; G01K7/24; G01K7/245; G06; G06F; G06F1/00; G06F1/16; G06F1/20; G06F1/206; G06F21/00; G06F21/70; G06F21/71; G06F21/73; G06F21/78; G06F21/79; G06F3/00; G06F3/01; G06F3/03; G06F3/033; G06F3/038; G06F3/0383; G06F3/048; G06F3/0487; G06F3/0489; G06F3/04897; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K7/00; G06K7/0013; G06K7/0021; G11; G11C; G11C5/00; G11C5/06; G11C5/066; G11C5/14; G11C5/143; G11C7/00; G11C7/06; G11C7/065; G11C7/24; G11C8/00; G11C8/20; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 53
Claim 1
Independent Claim
285 words
A serial-port memory positioned in a substantially token-shaped body, said substantially token-shaped body having a perimeter and a flange extending from a portion of said perimeter, said substantially token-shaped body comprising a plurality of electrically conductive surfaces physically insulated from one another, said plurality of electrically conductive surfaces forming said substantially token-shaped body and one electrically conductive surface of said plurality of electrically conductive surfaces forming said flange, said flange residing approximately in one geometric plane comprising: (a) a serial port electrically coupled to said plurality of electrically conductive surfaces; (b) a scratchpad memory electrically coupled to said serial port; (c) a second memory electrically coupled to said scratchpad memory; and (d) control logic electrically coupled to said serial port, said scratchpad memory and said second memory, said control logic transfering information from said scratchpad memory to said second memory as a block pursuant to a block transfer command received at said serial port via said plurality of electrically conductive surfaces, wherein said plurality of electrically conductive surfaces of said substantially token-shaped body comprise a first electrically conductive surface and a second electrically conductive surface that combine to create a hollow cavity, said serial port, scratchpad memory, second memory, and control logic positioned inside said hollow cavity, said first electrically conductive surface and said second electrically conductive surface electrically coupled to said serial port to transmit electrical signals generated by said serial port, scratchpad memory, second memory, and control logic and to receive externally generated electrical signals; and wherein said first electrically conductive surface and said second electrically conductive surface are planar surfaces, and further wherein a portion of said first electrically conductive surface and said second electrically conductive surface are parallel to one another.
Claim 2
Dependent Claim
285 words
A serial-port memory positioned in a substantially token-shaped body, said substantially token-shaped body having a perimeter and a flange extending from a portion of said perimeter, said substantially token-shaped body comprising a plurality of electrically conductive surfaces physically insulated from one another, said plurality of electrically conductive surfaces forming said substantially token-shaped body and one electrically conductive surface of said plurality of electrically conductive surfaces forming said flange, said flange residing approximately in one geometric plane comprising: (a) a serial port electrically coupled to said plurality of electrically conductive surfaces; (b) a scratchpad memory electrically coupled to said serial port; (c) a second memory electrically coupled to said scratchpad memory; and (d) control logic electrically coupled to said serial port, said scratchpad memory and said second memory, said control logic transfering information from said scratchpad memory to said second memory as a block pursuant to a block transfer command received at said serial port via said plurality of electrically conductive surfaces, wherein said plurality of electrically conductive surfaces of said substantially token-shaped body comprise a first electrically conductive surface and a second electrically conductive surface that combine to create a hollow cavity, said serial port, scratchpad memory, second memory, and control logic positioned inside said hollow cavity, said first electrically conductive surface and said second electrically conductive surface electrically coupled to said serial port to transmit electrical signals generated by said serial port, scratchpad memory, second memory, and control logic and to receive externally generated electrical signals; and wherein said first electrically conductive surface and said second electrically conductive surface are planar surfaces, and further wherein a portion of said first electrically conductive surface and said second electrically conductive surface are parallel to one another.
Claim 3
Dependent Claim
31 words
The memory of claim 1, wherein: (a) said control logic only transfers information to said second memory after a password identifying said second memory has been received at said serial port.
Claim 4
Dependent Claim
44 words
The memory of claim 1, wherein: (a) said control logic is electrically coupled to cyclic redundancy check circuitry that compares a portion of said information to a stored cyclic redundancy check value, said cyclic redundancy check circuitry also positioned in said substantially token-shaped body.
Claim 5
Dependent Claim
45 words
The memory of claim 3, wherein said cyclic redundancy check circuitry is comprised of a cyclic redundancy check generator that receives said stored cyclic redundancy check value and compares it to a first value generated by using a serial number stored in said second memory.
Claim 6
Dependent Claim
24 words
The memory of claim 4, wherein said first value is generated from said serial number using a generating polynomial x 3 +x 2 +1.
Claim 7
Dependent Claim
19 words
The memory of claim 4, wherein said serial number is 48 bits, said cyclic redundancy check is one byte.
Claim 8
Dependent Claim
56 words
The memory of claim 3, wherein a serial number and said cyclic redundancy check value is embedded in said control logic, a cyclic redundancy check generator evaluates said serial number, said cyclic redundancy check generator inserts said serial number into a preselected algorithm that generates an output which is compared to said cyclic redundancy check value.
Claim 9
Dependent Claim
63 words
The memory of claim 1, further comprising: (a) third and fourth memories coupled to said scratchpad memory, said third and fourth memories positioned in said substantially token-shaped body; and (b) wherein said control logic transfers information as a block from said scratchpad memory to one of said second, third, and fourth memories pursuant to a block transfer command received at said serial port.
Claim 10
Dependent Claim
24 words
The memory of claim 1, wherein said serial port, said scratchpad memory, said second memory and said control logic are powered by a battery.
Claim 11
Dependent Claim
64 words
The memory of claim 9, further comprising: (f) a voltage level detector coupled to said first and second electrically conductive surfaces for receiving signals applied as voltage level differences between said first and second electrically conductive surfaces; and (g) a switch connecting said first and second electrically conductive surfaces for sending signals by changing a resistance between said first and second electrically conductive surfaces.
Claim 12
Dependent Claim
28 words
The memory of claim 10, wherein said voltage level differences are approximately 5 volts and said voltage level differences correspond to a logical high and a logical low.
Claim 13
Dependent Claim
27 words
The memory of claim 9, wherein said serial port, said scratchpad memory, said second memory and said control logic are integrated on a monolithic piece of silicon.
Claim 14
Dependent Claim
20 words
The memory of claim 9, wherein said battery is a low voltage battery having a charge of approximately 1.5 volts.
Claim 15
Dependent Claim
21 words
The memory of claim 9, wherein said scratchpad memory has a first size and said second memory has a second size.
Claim 16
Dependent Claim
14 words
The memory of claim 14, wherein said second memory is static random access memory.
Claim 17
Dependent Claim
17 words
The memory of claim 14, wherein said second size is less than or equal to 4K bytes.
Claim 18
Dependent Claim
33 words
The memory of claim 1, wherein said serial port, said scratchpad memory, said second memory and said control logic are powered by voltage intermittently applied between said first and second electrically conductive surfaces.
Claim 19
Dependent Claim
25 words
The memory of claim 17, further comprising a capacitor for storing energy from said voltage intermittently applied between said first and second electrically conductive surfaces.
Claim 20
Dependent Claim
60 words
The memory of claim 1, wherein: (a) said first electrically conductive surface comprises a first flat face; and (b) said second electrically conductive surface comprises (b1) a second flat face parallel to said first flat face; and (b2) a portion of a first electrically conductive surface which is approximately perpendicular to said first flat face and said second flat face.
Claim 21
Dependent Claim
12 words
The memory of claim 1, wherein said substantially token-shaped body is button-shaped.
Claim 22
Dependent Claim
16 words
The memory of claim 1, wherein said substantially token-shaped body is mountable to a physical item.
Claim 23
Dependent Claim
39 words
The memory of claim 1, wherein said substantially token-shaped body is mountable to a physical item, said physical item is selected from a group consisting of maintenance records, retail products, machinery, cards, personnel identification badges, and any combination thereof.
Claim 24
Dependent Claim
19 words
The memory of claim 1, wherein said substantially token-shaped body has only said first and second electrically conductive surface.
Claim 25
Dependent Claim
25 words
The memory of claim 1, wherein said serial port, said scratchpad memory, said second memory and said control logic are packaged in a low-height package.
Claim 26
Dependent Claim
28 words
The memory of claim 24, wherein said low-height package is selected from the group consisting of a flat pack and small out-line integrated circuit, and any combination thereof.
Claim 27
Dependent Claim
41 words
The memory of claim 1, wherein said serial port, said scratchpad memory, said second memory and said control logic is combined into an integrated circuit that is mounted on a very small printed circuit board positioned in said substantially token-shaped body.
Claim 28
Dependent Claim
23 words
The memory of claim 1, wherein said substantially token-shaped body is cylindrical in shape and has a diameter approximately equal to 16 mm.
Claim 29
Dependent Claim
14 words
The memory of claim 1, wherein said substantially token-shaped body is comprised of metal.
Claim 30
Dependent Claim
18 words
The memory of claim 1, wherein a bus master module controls communication to and from said serial port.
Claim 31
Dependent Claim
80 words
The memory of claim 29, wherein said bus master module holds a data line to a first voltage level for a first time period, creates a transition between said first voltage level and a second voltage level, holds the data line at said second voltage for a second time period; and samples said voltage level of said data line to determine whether said data value is a first data value or a second data value at a first sample time.
Claim 32
Dependent Claim
15 words
The memory of claim 30, wherein said first time period is at least one microsecond.
Claim 33
Dependent Claim
20 words
The memory of claim 30, wherein said first voltage is approximately five volts and corresponds to a logic high level.
Claim 34
Dependent Claim
19 words
The memory of claim 30, wherein said second voltage is approximately ground and corresponds to a logic low level.
Claim 35
Dependent Claim
19 words
The memory of claim 30, wherein said transition provides a coordinating time from which said memory coordinates internal operations.
Claim 36
Dependent Claim
15 words
The memory of claim 30, wherein said second time period is at least one microsecond.
Claim 37
Dependent Claim
18 words
The memory of claim 30, wherein said first sample time is at least 30 microseconds from said transition.
Claim 38
Dependent Claim
96 words
The memory of claim 30, wherein said bus master module holds a data line coupled to said serial port via a first electrically conductive surface to a first voltage level for a first time period, creates a transition between said first voltage level and a second voltage level, holds said first data line to said second voltage for a second time period, and samples said voltage level of said data line by said bus master module to determine whether said data value is a first data value or a second data value at a first time.
Claim 39
Dependent Claim
15 words
The memory of claim 37, wherein said first time period is at least one microsecond.
Claim 40
Dependent Claim
16 words
The memory of claim 37, wherein said first time is approximately 10 microseconds after said transition.
Claim 41
Dependent Claim
12 words
The memory of claim 37, wherein said transition is a falling edge.
Claim 42
Dependent Claim
20 words
The memory of claim 37, wherein said first voltage is approximately five volts and corresponds to a logic high level.
Claim 43
Dependent Claim
19 words
The memory of claim 37, wherein said second voltage is approximately ground and corresponds to a logic low level.
Claim 44
Dependent Claim
20 words
The memory of claim 37, wherein said transition provides a coordinating time from which said slave module coordinates internal operations.
Claim 45
Dependent Claim
20 words
The memory of claim 37, wherein said second voltage level is 5 volts and corresponds to a logic high level.
Claim 46
Dependent Claim
26 words
The memory of claim 37, wherein said first time period and said second time period when combined together do not exceed 60 microseconds from said transition.
Claim 47
Dependent Claim
31 words
The memory of claim 37, wherein said first data value and said second data values are selected from the group consisting of a logical one value and a logical zero value.
Claim 48
Dependent Claim
38 words
The memory of claim 37, wherein said first time period and said second time period when combined together create a fourth time period which is approximately four times a difference between said first time period and said transition.
Claim 49
Dependent Claim
25 words
The memory of claim 1, wherein said serial port comprises a first input and a ground input coupled to said plurality of electrically conductive surfaces.
Claim 50
Dependent Claim
32 words
The memory of claim 1, wherein said serial port comprises only a first input coupled to said first electrically conductive surface and a ground input coupled to said second electrically conductive surface.
Claim 51
Dependent Claim
34 words
The memory of claim 1, wherein said control logic transfers information from said second memory to said serial port as a block pursuant to a second block transfer command received at said serial port.
Claim 52
Dependent Claim
15 words
The memory of claim 50, wherein said second block transfer command is a read command.
Claim 53
Dependent Claim
13 words
The memory of claim 1, wherein said block command is a write command.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-04-07 | 2000-10-07 | 2001-04-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-04-07 | 2004-10-07 | 2005-04-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-04-07 | 2008-10-07 | 2009-04-08 | $7700.00 | Window Closed / Lapsed |