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US5554873A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having polysilicon resistor with low temperature coefficient

Assignee: Texas Instruments Inc
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Filing: 1995-06-07
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Granted: 1996-09-10
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Expires: 2015-06-07
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Abstract

Abstract A semiconductor device having a p type polysilicon resistor (56) with a moderate sheet resistance and low temperature coefficient of resistance is formed by a double-level polysilicon process. The process also produces n and p-channel transistors (44, 50), a capacitor having upper and lower n type polysilicon capacitor plates (36, 26), an n type polysilicon resistor (32) having a high sheet resistance, and an n type resistor (34) having a low sheet resistance. The p type doping used to form the source/drain regions (48) of p-channel transistor (50) counterdopes n type second level polysilicon to form p type polysilicon resistor (56) without effecting capacitor plates (36, 26) or the n type resistors (32, 34).

Inventors

  • 👤 John P. Erdeljac
  • 👤 Louis N. Hutter

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 23:56
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10D88/00; H10P; H10P32/00; H10P32/30; H10P32/302; Y; Y10; Y10S; Y10S148/00; Y10S148/136; Y10S148/146; Y10S257/00; Y10S257/903; Y10S257/904; Y10S438/00; Y10S438/934

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 111 words
A semiconductor device, comprising: a semiconductor layer; a first polysilicon resistor of a first conductivity type formed over said semiconductor layer; a second polysilicon resistor of a second conductivity type opposite said first conductivity type formed over said semiconductor layer; said first and second polysilicon resistors doped with a first dose of a dopant of said second conductivity type, said first dose giving said second polysilicon resistor a sheet resistance in the range from about 500 to 2000 ohms/square, said first polysilicon resistor additionally doped with a second dose of a dopant of said first conductivity type so as to have a sheet resistance in the range of about 150-350 ohms/square.
Claim 2
Dependent Claim 111 words
A semiconductor device, comprising: a semiconductor layer; a first polysilicon resistor of a first conductivity type formed over said semiconductor layer; a second polysilicon resistor of a second conductivity type opposite said first conductivity type formed over said semiconductor layer; said first and second polysilicon resistors doped with a first dose of a dopant of said second conductivity type, said first dose giving said second polysilicon resistor a sheet resistance in the range from about 500 to 2000 ohms/square, said first polysilicon resistor additionally doped with a second dose of a dopant of said first conductivity type so as to have a sheet resistance in the range of about 150-350 ohms/square.
Claim 3
Dependent Claim 32 words
The semiconductor device of claim 1 further comprising: a third polysilicon resistor of said second conductivity type formed over said semiconductor layer and having a sheet resistance less than about 60 ohms/square.
Claim 4
Dependent Claim 19 words
The semiconductor device of claim 1 in which the sheet resistance of said first resistor is about 170 ohms/square.
Claim 5
Dependent Claim 101 words
A semiconductor device, comprising: a semiconductor layer; a first polysilicon resistor of a first conductivity type formed over said semiconductor layer; a second polysilicon resistor of a second conductivity type opposite said first conductivity type formed over said semiconductor layer; said first and second polysilicon resistors doped with a first dose of a dopant of said second conductivity type, said first dose giving said second polysilicon resistor a positive temperature coefficient, said first polysilicon resistor additionally doped with a second dose of a dopant of said second conductivity type so as to have a temperature coefficient of resistance of about zero.
Claim 6
Dependent Claim 101 words
A semiconductor device, comprising: a semiconductor layer; a first polysilicon resistor of a first conductivity type formed over said semiconductor layer; a second polysilicon resistor of a second conductivity type opposite said first conductivity type formed over said semiconductor layer; said first and second polysilicon resistors doped with a first dose of a dopant of said second conductivity type, said first dose giving said second polysilicon resistor a positive temperature coefficient, said first polysilicon resistor additionally doped with a second dose of a dopant of said second conductivity type so as to have a temperature coefficient of resistance of about zero.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-09-10 2000-03-11 2000-09-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-09-10 2004-03-11 2004-09-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-09-10 2008-03-11 2008-09-10 $7700.00 Window Closed / Lapsed

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