US4579600A — Method of making zero temperature coefficient of …

Claim 1

Independent Claim 72 words

A method for fabricating polysilicon resistors in integrated circuits, comprising the steps of: (a) providing a semiconductor substrate; (b) forming a doped polysilicon layer on said substrate; (c) annealing said polysilicon layer to increase the grain size thereof; (d) passivating said annealed polysilicon layer with a passivating species, to reduce the trap density at the grain boundaries of said polysilicon; and (e) forming spaced connections to said polysilicon to form a resistor.

Claim 2

Independent Claim 72 words

A method for fabricating polysilicon resistors in integrated circuits, comprising the steps of: (a) providing a semiconductor substrate; (b) forming a doped polysilicon layer on said substrate; (c) annealing said polysilicon layer to increase the grain size thereof; (d) passivating said annealed polysilicon layer with a passivating species, to reduce the trap density at the grain boundaries of said polysilicon; and (e) forming spaced connections to said polysilicon to form a resistor.

Claim 3

Dependent Claim 13 words

The method of claim 1, wherein said transient annealing step comprises laser annealing.

Claim 4

Dependent Claim 21 words

The method of claim 2, wherein said transient annealing step applies an energy density of approximately 0.6 Joule per square centimeter.

Claim 5

Dependent Claim 65 words

The method of claim 1, further including forming an insulating layer on said substrate wherein said polysilicon is deposited over said insulating layer, and wherein said annealing step includes application of two wave lengths of light, comprising a first wavelength which is strongly absorbed by polysilicon and a second wavelength to which polysilicon is substantially transparent but which is strongly absorbed by said insulating layer.

Claim 6

Dependent Claim 12 words

The method of claim 1, wherein said passivating species comprises hydrogen ions.

Claim 7

Dependent Claim 19 words

The method of claim 5, wherein said passivating step comprises exposing said transiently annealed polysilicon to a hydrogen plasma.

Claim 8

Dependent Claim 19 words

The method of claim 5, wherein said passivating step comprises ion implanting said transiently annealed polysilicon with hydrogen ions.

Claim 9

Dependent Claim 28 words

The method of claim 1 wherein said doped polysilicon is doped to a dopant concentration in the range of 10 17 to 10 18 atoms per cubic centimeter.

Claim 10

Dependent Claim 19 words

The method of claim 8, wherein said polysilicon comprises a thickness in the range of 500 to 6000 Angstroms.

Claim 11

Dependent Claim 32 words

The method of claim 1, wherein said annealing step comprises applying to said polysilicon layer an energy density sufficient to increase the grain size of said polysilicon to at least 3 microns.

Claim 12

Independent Claim 71 words

A method of fabricating a resistor having a low temperature coefficient of resistance in a semiconductor substrate, comprising the steps of: (a) providing a semiconductor substrate; (b) implanting a dopant into said substrate in a desired location of said resistor; (c) pinning defects and subgrain boundaries in said implanted substrate in a gas selected from the class consisting of fluorine and chlorine; and (d) annealing said implant to form said resistor.

Claim 13

Independent Claim 71 words

A method of fabricating a resistor having a low temperature coefficient of resistance in a semiconductor substrate, comprising the steps of: (a) providing a semiconductor substrate; (b) implanting a dopant into said substrate in a desired location of said resistor; (c) pinning defects and subgrain boundaries in said implanted substrate in a gas selected from the class consisting of fluorine and chlorine; and (d) annealing said implant to form said resistor.

Claim 14

Independent Claim 68 words

A method of forming polysilicon resistors in integrated circuits having substantially zero temperature coefficient of resistance, comprising the steps of: (a) providing a semiconductor substrate; (b) forming a doped polysilicon layer on said substrate; (c) increasing the grain size of the grains forming said polysilicon layer; (d) passivating the grain boundaries of said polysilicon layer; and (e) forming spaced connections to said polysilicon layer to form a resistor.

Claim 15

Independent Claim 68 words

A method of forming polysilicon resistors in integrated circuits having substantially zero temperature coefficient of resistance, comprising the steps of: (a) providing a semiconductor substrate; (b) forming a doped polysilicon layer on said substrate; (c) increasing the grain size of the grains forming said polysilicon layer; (d) passivating the grain boundaries of said polysilicon layer; and (e) forming spaced connections to said polysilicon layer to form a resistor.

Claim 16

Dependent Claim 18 words

A method as set forth in claim 12 wherein step (c) comprises laser annealing of said polysilicon layer.

Claim 17

Dependent Claim 17 words

A method as set forth in claim 13 wherein step (d) comprises passivation using a hydrogen-containing species.

Claim 18

Dependent Claim 17 words

A method as set forth in claim 12 wherein step (d) comprises passivation using a hydrogen-containing species.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1989-03-31	1989-09-30	1990-04-01	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1993-03-31	1993-09-30	1994-04-01	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1997-03-31	1997-09-30	1998-04-01	$7700.00	Window Closed / Lapsed

Method of making zero temperature coefficient of resistance resistors

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