← Back to Patent Explorer
US4047976A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing a high-speed semiconductor device

Assignee: Motorola Solutions Inc
•
Filing: 1976-06-21
•
Granted: 1977-09-13
•
Expires: 1996-06-21
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for manufacturing high speed semiconductor devices by selectively reducing the minority carrier lifetime in regions susceptible to minority carrier charge storage. The selective reduction is achieved by implanting ions of low atomic weight into the surface of the semiconductor crystal in order to locally reduce the sub-surface lifetime.

Inventors

  • 👤 Jerry L. Bledsoe
  • 👤 Clarence A. Lund

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 13:12
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D62/00; H10D62/50; H10D62/53; H10P30/208; Y; Y10; Y10S; Y10S438/00; Y10S438/904

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 25 words
A method for increasing the switching speed of a semiconductor device comprising the step of selectively reducing minority carrier lifetime by high energy proton implantation.
Claim 2
Independent Claim 25 words
A method for increasing the switching speed of a semiconductor device comprising the step of selectively reducing minority carrier lifetime by high energy proton implantation.
Claim 3
Dependent Claim 25 words
The method of claim 1 where the semiconductor device is a transistor and the lifetime is selectively reduced in the collector region of the transistor.
Claim 4
Dependent Claim 17 words
The method of claim 2 where the energy of the proton implantation is 150 keV or greater.
Claim 5
Independent Claim 33 words
A method for controlling the relative switching speeds of active devices on a common semiconductor substrate comprising the steps of reducing minority carrier lifetime in preselected active regions by high energy proton implantation.
Claim 6
Independent Claim 33 words
A method for controlling the relative switching speeds of active devices on a common semiconductor substrate comprising the steps of reducing minority carrier lifetime in preselected active regions by high energy proton implantation.
Claim 7
Dependent Claim 16 words
The method of claim 4 where the protons have an energy of 150 keV or greater.
Claim 8
Dependent Claim 33 words
The method of claim 4 where said preselected active regions are determined by masking other regions with a maskant having a lower projected range for said implanted species than said preselected active regions.

References Cited (Backward Citations)

US3431150A Cited
US3515956A Cited
US3513035A Cited
US3824133A Cited
US3849204A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-09-12 1981-03-14 1981-09-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-09-12 1985-03-14 1985-09-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-09-12 1989-03-14 1989-09-13 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag