US4377819A
Expired / Lapsed
US
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Semiconductor device
Assignee: Hitachi Ltd
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Filing: 1979-04-20
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Granted: 1983-03-22
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Expires: 1999-04-20
Abstract
Abstract A semiconductor device including at least a resistance element formed of polycrystalline silicon having a high resistivity. An electrode is provided on the high resistance polycrystalline silicon region with a silicon dioxide film and a silicon nitride film being interposed therebetween. The electrode is coupled to the ground potential. In this manner, high stability is obtained in the behavior of the resistance element inasmuch as the formation of a parasitic MOS device under said high resistance region is suppressed, and the threshold voltage of any such MOS device is made raised.
Inventors
- 👤 Yoshio Sakai
- 👤 Toshiaki Masuhara
- 👤 Osamu Minato
- 👤 Toshio Sasaki
- 👤 Hisao Katto
- 👤 Norikazu Hashimoto
- 👤 Shin-ichi Muramatsu
- 👤 Akihiro Tomozawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:37
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215; H10B; H10B10/00; H10B10/15; H10D; H10D1/00; H10D1/40; H10D1/47; H10D64/00; H10D64/111; H10D64/20; H10D84/00; H10D84/01; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/66; H10P14/662; H10P14/694; H10P14/6943; H10P14/69433; H10P14/6922; H10P14/6923
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
127 words
A semiconductor device comprising at least a resistance element including a resistance part formed of polycrystalline silicon of a high resistance and p-type conductivity terminal parts formed of polycrystalline silicon of a low resistance at both end portions of said resistance part, wherein a metal electrode is provided above said resistance part with an insulation layer being interposed therebetween, said electrode being coupled to a predetermined potential, wherein said insulation layer includes a first film containing silicon dioxide as a main component and a second film formed of silicon nitride on said first film through chemical vapor deposition, said first film having a thickness in the range of 5 to 100 nm, and said second film having a thickness in the range of 30 to 100 nm.
Claim 2
Dependent Claim
127 words
A semiconductor device comprising at least a resistance element including a resistance part formed of polycrystalline silicon of a high resistance and p-type conductivity terminal parts formed of polycrystalline silicon of a low resistance at both end portions of said resistance part, wherein a metal electrode is provided above said resistance part with an insulation layer being interposed therebetween, said electrode being coupled to a predetermined potential, wherein said insulation layer includes a first film containing silicon dioxide as a main component and a second film formed of silicon nitride on said first film through chemical vapor deposition, said first film having a thickness in the range of 5 to 100 nm, and said second film having a thickness in the range of 30 to 100 nm.
Claim 3
Dependent Claim
142 words
A semiconductor device comprising at least a resistance element including a resistance part formed of polycrystalline silicon of a high resistance and p-type conductivity terminal parts formed of polycrystalline silicon of a low resistance at both end portions of said resistance part, and an electrode provided above said resistance part, wherein said semiconductor device further includes means for suppressing the formation of a parasitic MOS device under the resistance part of said polycrystalline silicon and for raising the threshold voltage of any such parasitic MOS device which is formed, said means comprising coupling means for coupling said electrode to a predetermined potential, and an insulation layer interposed between said metal electrode and said resistance part including a first film containing silicon dioxide as a main component and a second film formed of silicon nitride on said first film through chemical vapor deposition.
Claim 4
Dependent Claim
142 words
A semiconductor device comprising at least a resistance element including a resistance part formed of polycrystalline silicon of a high resistance and p-type conductivity terminal parts formed of polycrystalline silicon of a low resistance at both end portions of said resistance part, and an electrode provided above said resistance part, wherein said semiconductor device further includes means for suppressing the formation of a parasitic MOS device under the resistance part of said polycrystalline silicon and for raising the threshold voltage of any such parasitic MOS device which is formed, said means comprising coupling means for coupling said electrode to a predetermined potential, and an insulation layer interposed between said metal electrode and said resistance part including a first film containing silicon dioxide as a main component and a second film formed of silicon nitride on said first film through chemical vapor deposition.
Claim 5
Dependent Claim
32 words
A semiconductor device according to claim 1 or 2, wherein at least one of said terminal parts is provided with a contact part formed of n-type polycrystalline silicon of a low resistivity.
Claim 6
Dependent Claim
32 words
A semiconductor device according to claim 1 or 2, wherein said resistance element constitutes a load resistance of a memory circuit, while said electrode constitutes a grounded electrode of said memory circuit.
Claim 7
Dependent Claim
22 words
A semiconductor device according to claim 2, wherein said first film has a thickness in the range of 5 to 100 nm.
Claim 8
Dependent Claim
24 words
A semiconductor device according to claim 2 or 5, wherein said second film has a thickness in the range of 30 to 100 nm.
Claim 9
Dependent Claim
14 words
A semiconductor device according to claim 2, wherein said electrode is a metal electrode.
Claim 10
Dependent Claim
15 words
A semiconductor device according to claim 1 or 2, wherein said predetermined potential is ground.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-03-21 | 1986-09-20 | 1987-03-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-03-21 | 1990-09-20 | 1991-03-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-03-21 | 1994-09-20 | 1995-03-22 | $7700.00 | Window Closed / Lapsed |