US5439831A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low junction leakage MOSFETs
Assignee: Siemens AG
•
Filing: 1994-03-09
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Granted: 1995-08-08
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Expires: 2014-03-09
Abstract
Abstract Shallow junction field effect transistors are made by a low temperature process comprising ion implanting source/drain regions through a buffer layer in two steps, the first an ion implant at high dosage and low energy and the second an ion implant at low dosage and high energy. Ion implantation through the buffer layer avoids crystallographic damage to the silicon substrate. By grading the sidewall spacers of the gate electrode, more or fewer ions can be implanted through the spacer foot to ensure continuity between the source/drain regions and the channel region under the gate electrode.
Inventors
- 👤 Udo Schwalke
- 👤 Heinz Zeininger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:40
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0135; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D84/0147; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10P30/21; H10P30/212; H10P30/225; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
68 words
In a method of making shallow junction metal oxide semiconductor field effect transistors, the improvement comprising depositing a buffer layer over the substrate surface adjacent to the gate electrode; ion implanting a first dopant at a high dosage, low energy level into the buffer layer; ion implanting a second dopant at a low dosage, high energy level into the buffer layer; and diffusing said ions into said substrate.
Claim 2
Dependent Claim
68 words
In a method of making shallow junction metal oxide semiconductor field effect transistors, the improvement comprising depositing a buffer layer over the substrate surface adjacent to the gate electrode; ion implanting a first dopant at a high dosage, low energy level into the buffer layer; ion implanting a second dopant at a low dosage, high energy level into the buffer layer; and diffusing said ions into said substrate.
Claim 3
Dependent Claim
15 words
A method according to claim 1 wherein said first and second dopant are the same.
Claim 4
Dependent Claim
20 words
A method according to claim 2 wherein said dopant is from the group consisting of phosphorus, arsenic, boron and BF2.
Claim 5
Dependent Claim
16 words
A method according to claim 1 wherein said ions are diffused during a subsequent planarization step.
Claim 6
Dependent Claim
15 words
A method according to claim 1 wherein said gate electrode has a graded sidewall spacer.
Claim 7
Dependent Claim
30 words
A method according to claim 5 wherein said graded sidewall spacer has a foot portion of variable thickness to permit more or fewer ions to pass therethrough during ion implantation.
Claim 8
Dependent Claim
14 words
A method according to claim 1 wherein said first and second dopants are different.
Claim 9
Dependent Claim
20 words
A method according to claim 7 wherein said dopants are from the group consisting of phosphorus, arsenic, boron, and BF2.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-08-07 | 1999-02-06 | 1999-08-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-08-07 | 2003-02-06 | 2003-08-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-08-07 | 2007-02-06 | 2007-08-08 | $7700.00 | Window Closed / Lapsed |