Precision resistor in self-aligned silicided mos process

Claim 1

A method of making a resistor in the manufacture of integrated circuit devices, comprising the steps of: a) forming transistor gates in transistor areas at a face of a semiconductor body; b) depositing a conformal coating of oxide on said face; c) masking a resistor area of said face and exposing said transistor areas; d) etching said face in a directional manner to leave said oxide on said resistor area to leave sidewall spacers adjacent said gates in said transistor areas; e) simultaneously forming silicided areas on said face on opposite sides of said oxide on said resistor area, and on source/drain areas adjacent said sidewall spacers.

Claim 2

A method of making a resistor in the manufacture of integrated circuit devices, comprising the steps of: a) forming transistor gates in transistor areas at a face of a semiconductor body; b) depositing a conformal coating of oxide on said face; c) masking a resistor area of said face and exposing said transistor areas; d) etching said face in a directional manner to leave said oxide on said resistor area to leave sidewall spacers adjacent said gates in said transistor areas; e) simultaneously forming silicided areas on said face on opposite sides of said oxide on said resistor area, and on source/drain areas adjacent said sidewall spacers.

Claim 7

A method of making an integrated circuit device, comprising the steps of: a) forming an N-well in a face of a silicon body at a first transistor area and another N-well in said face at a resistor area, and forming field oxide on said face; b) forming a first polysilicon transistor gate at said in said first transistor area and a second polysilicon transistor gate in a second transistor area surrounded by said field oxide; c) introducing impurity into said face using said first and second polysilicon transistor gates as masks to create source/drain regions in said first and second transistor areas and to create a resistor region in said N-well in said resistor area; d) depositing a conformal coating of silicon oxide on said face; e) masking a part of said resistor area; f) etching said oxide in a directional manner to leave said conformal coating of oxide on said part of said resistor area and to leave sidewall spacers adjacent said transistor gates; g) forming silicided areas on said face on opposite sides of said oxide on said resistor area, and on said source/drain regions adjacent said sidewall spacers.

Claim 8

A method of making an integrated circuit device, comprising the steps of: a) forming an N-well in a face of a silicon body at a first transistor area and another N-well in said face at a resistor area, and forming field oxide on said face; b) forming a first polysilicon transistor gate at said in said first transistor area and a second polysilicon transistor gate in a second transistor area surrounded by said field oxide; c) introducing impurity into said face using said first and second polysilicon transistor gates as masks to create source/drain regions in said first and second transistor areas and to create a resistor region in said N-well in said resistor area; d) depositing a conformal coating of silicon oxide on said face; e) masking a part of said resistor area; f) etching said oxide in a directional manner to leave said conformal coating of oxide on said part of said resistor area and to leave sidewall spacers adjacent said transistor gates; g) forming silicided areas on said face on opposite sides of said oxide on said resistor area, and on said source/drain regions adjacent said sidewall spacers.

Claim 10

A method of making an integrated circuit device, comprising the steps of: a) forming an N-well in a face of a silicon body at a first transistor area and another N-well in said face at a resistor area, and forming field oxide on said face; b) forming a first polysilicon transistor gate at said face in said first transistor area and a second polysilicon transistor gate in a second transistor area surrounded by said field oxide; c) introducing impurity into said face using said first and second polysilicon transistor gates as masks to create source/drain regions in said first and second transistor areas and to create a resistor region in said N-well in said resistor area; said step of introducing impurity including a step of introducing a P-type impurity to create a P-channel transistor in said N-well in said transistor area, and a separate step of introducing N-type impurity at said second transistor area; and wherein said step of introducing N-type impurity creates said resistor region; d) depositing a conformal coating of silicon oxide on said face; e) masking a part of said resistor area; f) etching said oxide in a directional manner to leave said conformal coating of oxide on said part of said resistor area and to leave sidewall spacers adjacent said transistor gates; g) forming silicided areas on said face on opposite sides of said oxide on said resistor area, and on said source/drain regions adjacent said sidewall spacers.

Claim 11

A method of making an integrated circuit device, comprising the steps of: a) forming an N-well in a face of a silicon body at a first transistor area and another N-well in said face at a resistor area, and forming field oxide on said face; b) forming a first polysilicon transistor gate at said face in said first transistor area and a second polysilicon transistor gate in a second transistor area surrounded by said field oxide; c) introducing impurity into said face using said first and second polysilicon transistor gates as masks to create source/drain regions in said first and second transistor areas and to create a resistor region in said N-well in said resistor area; said step of introducing impurity including a step of introducing a P-type impurity to create a P-channel transistor in said N-well in said transistor area, and a separate step of introducing N-type impurity at said second transistor area; and wherein said step of introducing N-type impurity creates said resistor region; d) depositing a conformal coating of silicon oxide on said face; e) masking a part of said resistor area; f) etching said oxide in a directional manner to leave said conformal coating of oxide on said part of said resistor area and to leave sidewall spacers adjacent said transistor gates; g) forming silicided areas on said face on opposite sides of said oxide on said resistor area, and on said source/drain regions adjacent said sidewall spacers.

Claim 14

A method of making a circuit device in the manufacture of integrated circuit devices, comprising the steps of: a) forming transistor gates in transistor areas at a face of a semiconductor body; b) depositing a conformal coating of oxide on said face; c) masking a selected area of said face spaced from said transistor areas, and exposing said transistor areas; d) etching said oxide in a directional manner using said masking to leave said oxide on said selected area and to leave sidewall spacers adjacent said gates in said transistor areas; e) simultaneously forming silicided areas on said face on opposite sides of said oxide on said selected area, and on source/drain areas adjacent said sidewall spacers.

Claim 15

A method of making a circuit device in the manufacture of integrated circuit devices, comprising the steps of: a) forming transistor gates in transistor areas at a face of a semiconductor body; b) depositing a conformal coating of oxide on said face; c) masking a selected area of said face spaced from said transistor areas, and exposing said transistor areas; d) etching said oxide in a directional manner using said masking to leave said oxide on said selected area and to leave sidewall spacers adjacent said gates in said transistor areas; e) simultaneously forming silicided areas on said face on opposite sides of said oxide on said selected area, and on source/drain areas adjacent said sidewall spacers.