US4212083A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOS Integrated with implanted resistor elements
Assignee: Texas Instruments Inc
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Filing: 1978-08-18
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Granted: 1980-07-08
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Expires: 1998-08-18
Abstract
Abstract Resistor elements for MOS integrated circuits are made by an ion implant step compatable with a self-aligned N-channel silicon-gate process. The resistor elements are beneath the field oxide in the finished device, although the implant step is prior to formation of the thick oxide. Resistors of this type are ideally suited for load devices in static RAM cells.
Inventors
- 👤 G. R. Mohan Rao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:20
CPC Classifications
H; H10; H10B; H10B10/00; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/412; H10B10/15; H10D; H10D1/00; H10D1/40; H10D1/43; H10D84/00; H10D84/80; H10D84/811; H10D84/817; Y; Y10; Y10S; Y10S257/00; Y10S257/903; Y10S257/904
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
160 words
In a static RAM cell for use in a semiconductor integrated circuit memory device, a pair of driver transistors, formed in a face of a body of semiconductor material, each transistor including a source-to-drain path and a gate separated from the source-to-drain path by a thin insulator coating, a thick thermally grown field oxide layer much thicker than said coating surrounding said source-to-drain path and gate of the transistors on said face and extending deeper into the face than said thin insulator coating, a pair of load devices, means connecting the source-to-drain path of each of the driver transistors in series with a load device, means cross-coupling an output electrode at one end of the source-to-drain path of each driver transistor to said gate of the other driver transistor, the improvement wherein resistor elements providing said load devices comprise lightly-doped semiconductor material of conductivity-type opposite that of material immediately thereunder, said layer of thermally-grown field oxide overlying the resistor elements.
Claim 2
Dependent Claim
160 words
In a static RAM cell for use in a semiconductor integrated circuit memory device, a pair of driver transistors, formed in a face of a body of semiconductor material, each transistor including a source-to-drain path and a gate separated from the source-to-drain path by a thin insulator coating, a thick thermally grown field oxide layer much thicker than said coating surrounding said source-to-drain path and gate of the transistors on said face and extending deeper into the face than said thin insulator coating, a pair of load devices, means connecting the source-to-drain path of each of the driver transistors in series with a load device, means cross-coupling an output electrode at one end of the source-to-drain path of each driver transistor to said gate of the other driver transistor, the improvement wherein resistor elements providing said load devices comprise lightly-doped semiconductor material of conductivity-type opposite that of material immediately thereunder, said layer of thermally-grown field oxide overlying the resistor elements.
Claim 3
Dependent Claim
13 words
A device according to claim 1 wherein the resistor elements are phosphorus-implanted regions.
Claim 4
Dependent Claim
101 words
An integrated semiconductor device including a buried resistor comprising: an active circuit element formed in a face of a semiconductor body and including regions of doped semiconductor material in said face; a layer of thick, thermally grown field oxide surrounding said regions on said face, said layer extending into the face having a thickness not substantially less than the depth of said regions; and a resistor element comprising lightly-doped semiconductor material of conductivity-type opposite that of material immediately thereunder, said layer of field oxide overlying said resistor element; one end of the resistor element being connected to one of said regions.
Claim 5
Dependent Claim
101 words
An integrated semiconductor device including a buried resistor comprising: an active circuit element formed in a face of a semiconductor body and including regions of doped semiconductor material in said face; a layer of thick, thermally grown field oxide surrounding said regions on said face, said layer extending into the face having a thickness not substantially less than the depth of said regions; and a resistor element comprising lightly-doped semiconductor material of conductivity-type opposite that of material immediately thereunder, said layer of field oxide overlying said resistor element; one end of the resistor element being connected to one of said regions.
Claim 6
Dependent Claim
35 words
A device according to claim 3 wherein the active circuit element is a field effect transistor, said regions include source and drain, and a gate overlies said face separated therefrom by a thin insulator coating.
Claim 7
Dependent Claim
19 words
A device according to claim 4 wherein said layer of field oxide is much thicker than said insulator coating.
Claim 8
Dependent Claim
21 words
A device according to claim 5 wherein said one end of the resistor element is integral with one of said regions.
References Cited (Backward Citations)
US3889358A
Cited
US3946369A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-07-08 | 1984-01-07 | 1984-07-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-07-08 | 1988-01-07 | 1988-07-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-07-08 | 1992-01-07 | 1992-07-08 | $7700.00 | Window Closed / Lapsed |