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US5079180A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating a raised source/drain transistor

Assignee: Texas Instruments Inc
•
Filing: 1990-08-16
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Granted: 1992-01-07
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Expires: 2010-08-16
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Abstract

Abstract A raised source/drain transistor is provided having thin sidewall spacing insulators (54) adjacent the transistor gate (48). A first sidewall spacer (64) is disposed adjacent thin sidewall spacing insulator (54) and raised source/drain region (60). A second sidewall spacer (66) is formed at the interface between field insulating region (44) and raised source/drain region (60).

Inventors

  • 👤 Mark S. Rodder
  • 👤 Richard A. Chapman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:55
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0275

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 117 words
A method of forming a transistor structure associated with a semiconductor substrate, comprising: forming first and second insulating regions disposed outwardly from said substrate to define a moat area therebetween; forming a gate disposed outwardly from said moat area, said gate including sidewalls and defining a channel region in the substrate thereunder; forming a sidewall insulator adjacent said sidewalls of said gate; forming a raised moat region disposed along said moat and between said sidewall insulator and said first insulating region; and forming an insulating first sidewall spacer disposed adjacent said sidewall insulator and said raised moat region with at least a portion of said first sidewall spacer disposed between said gate and said raised moat region.
Claim 2
Independent Claim 117 words
A method of forming a transistor structure associated with a semiconductor substrate, comprising: forming first and second insulating regions disposed outwardly from said substrate to define a moat area therebetween; forming a gate disposed outwardly from said moat area, said gate including sidewalls and defining a channel region in the substrate thereunder; forming a sidewall insulator adjacent said sidewalls of said gate; forming a raised moat region disposed along said moat and between said sidewall insulator and said first insulating region; and forming an insulating first sidewall spacer disposed adjacent said sidewall insulator and said raised moat region with at least a portion of said first sidewall spacer disposed between said gate and said raised moat region.
Claim 3
Dependent Claim 37 words
The method of claim 1 and further including forming a region within said raised moat region and adjacent said first sidewall spacer, said region being of a different dopant concentration than the remainder of said moat region.
Claim 4
Dependent Claim 59 words
The method of claim 1 wherein said step of forming the sidewall insulator comprises forming a thin sidewall insulator, said thin sidewall insulator of a thickness such that dopants implanted through said raised moat region may move laterally within said substrate to electrically connect said raised moat region to said channel region, while maintaining shallow junctions within said substrate.
Claim 5
Dependent Claim 28 words
The method of claim 3 wherein said step of forming said thin sidewall insulator comprises forming the thin sidewall insulator of a thickness less than nine hundred angstroms.
Claim 6
Dependent Claim 18 words
The method of claim 1 wherein said step of forming the raised moat region comprises forming epitaxial silicon.
Claim 7
Dependent Claim 18 words
The method of claim 1 wherein said step of forming the first sidewall spacer comprises forming an insulator.
Claim 8
Dependent Claim 22 words
The method of claim 1 and further including forming a junction region prior to said step of forming said raised moat region.
Claim 9
Dependent Claim 21 words
The method of claim 1 and further including forming a junction region after said step of forming said raised moat region.
Claim 10
Independent Claim 100 words
A method of forming a transistor structure associated with a semiconductor substrate, comprising: forming first and second insulating regions disposed outwardly from said substrate to define a moat area therebetween; forming a gate disposed outwardly from said moat area, said gate including sidewalls and defining a channel region in the substrate thereunder; forming a sidewall insulator adjacent said sidewalls of said gate; forming a raised moat region disposed along said moat area and between said sidewall insulator and said first insulating region; and forming an insulating first sidewall spacer disposed adjacent said first insulating region and said raised moat region.
Claim 11
Independent Claim 100 words
A method of forming a transistor structure associated with a semiconductor substrate, comprising: forming first and second insulating regions disposed outwardly from said substrate to define a moat area therebetween; forming a gate disposed outwardly from said moat area, said gate including sidewalls and defining a channel region in the substrate thereunder; forming a sidewall insulator adjacent said sidewalls of said gate; forming a raised moat region disposed along said moat area and between said sidewall insulator and said first insulating region; and forming an insulating first sidewall spacer disposed adjacent said first insulating region and said raised moat region.
Claim 12
Dependent Claim 52 words
The method of claim 9 wherein said sidewall insulator adjacent said sidewall of said gate is of a thickness such that dopants implanted through said raised moat region may move laterally within said substrate to electrically connect said raised moat region to said channel region, while maintaining shallow junctions within said substrate.
Claim 13
Dependent Claim 26 words
The method of claim 9 wherein said step of forming the thin insulator comprises forming the thin insulator of a thickness less than nine hundred angstroms.
Claim 14
Dependent Claim 33 words
The method of claim 9 forming a second sidewall spacer disposed adjacent said sidewall insulator and said raised moat region, wherein said step of forming the second sidewall spacer comprises forming an insulator.
Claim 15
Dependent Claim 37 words
The method of claim 9 and further including forming a region within said raised moat region and adjacent said first sidewall spacer, said region being of a different dopant concentration that the remainder of said moat region.
Claim 16
Dependent Claim 18 words
The method of claim 9 wherein said step of forming the raised moat region comprises forming epitaxial silicon.
Claim 17
Independent Claim 148 words
A method of forming a transistor structure associated with a semiconductor substrate, comprising: forming first and second insulating regions disposed outwardly from said substrate to define a moat area therebetween; forming a gate disposed outwardly from said moat area, said gate including sidewalls and defining a channel region in the substrate thereunder; forming a sidewall insulator adjacent said sidewalls of said gate; forming a raised moat region disposed along said moat and between said sidewall insulator and said first insulating region; forming an insulating first sidewall spacer disposed adjacent said sidewall insulator and said raised moat region with at least a portion of said first sidewall spacer disposed between said gate and said raised moat region; and further including forming a second sidewall spacer disposed adjacent said first insulating region and said raised moat region, wherein said step of forming the second sidewall spacer comprises forming an insulator.
Claim 18
Independent Claim 148 words
A method of forming a transistor structure associated with a semiconductor substrate, comprising: forming first and second insulating regions disposed outwardly from said substrate to define a moat area therebetween; forming a gate disposed outwardly from said moat area, said gate including sidewalls and defining a channel region in the substrate thereunder; forming a sidewall insulator adjacent said sidewalls of said gate; forming a raised moat region disposed along said moat and between said sidewall insulator and said first insulating region; forming an insulating first sidewall spacer disposed adjacent said sidewall insulator and said raised moat region with at least a portion of said first sidewall spacer disposed between said gate and said raised moat region; and further including forming a second sidewall spacer disposed adjacent said first insulating region and said raised moat region, wherein said step of forming the second sidewall spacer comprises forming an insulator.
Claim 19
Dependent Claim 46 words
The method of claim 15 wherein: said sidewall insulator is of a thickness such that dopants implanted through said raised moat region may move laterally within said substrate to electrically connect said raised moat region to said channel region, while maintaining shallow junctions within said substrate.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-01-06 1995-07-08 1996-01-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-01-06 1999-07-08 2000-01-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-01-06 2003-07-08 2004-01-07 $7700.00 Window Closed / Lapsed

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