Method of making submicron FET structure

Claim 1

A method of forming a small area field effect transistor device and making contact thereto comprising: providing a monocrystalline semiconductor body whose at least surface region is of a first conductivity; forming an insulating layer on said surface region; forming a substantially horizontal, patterned first conductive layer over said insulating layer; masking and etching said insulating and first conductive layers to provide an opening in said layers to the semiconductor body where the source, drain and gate regions of said device is desired to be formed; said opening have substantially vertical surfaces on the layered structure; forming a conformal highly doped of a second conductivity conductive layer over said openings having said substantially vertical surfaces and over said insulating and patterned conductive layer; etching said conformal conductive layer to substantially remove the horizontal portions of said conformal layer while leaving said opening with a substantially vertical said conformal conductive layer on the designated sides of said opening; heating said body and said layered structure at a suitable temperature to cause dopant of a second conductivity to diffuse into said body from said conformal conductive layer to form said source and drain regions and first insulator layer upon the surface of the said first conductive layer and said conformal conductor layer; forming a second insulator layer over said vertical conformal conductive layer; forming a gate dielectric on the surface of said semiconductor body between the said source and drain region; forming a gate conductive layer over said gate dielectric; forming electrical contacts to said patterned first conductive layer through said first insulator layer which effectively makes electrical contacts to said source and drain regions through said first patterned conductive layer and said vertical conformal conductive layers; and forming an electrical contact to said gate conductive layer.

Claim 2

A method of forming a small area field effect transistor device and making contact thereto comprising: providing a monocrystalline semiconductor body whose at least surface region is of a first conductivity; forming an insulating layer on said surface region; forming a substantially horizontal, patterned first conductive layer over said insulating layer; masking and etching said insulating and first conductive layers to provide an opening in said layers to the semiconductor body where the source, drain and gate regions of said device is desired to be formed; said opening have substantially vertical surfaces on the layered structure; forming a conformal highly doped of a second conductivity conductive layer over said openings having said substantially vertical surfaces and over said insulating and patterned conductive layer; etching said conformal conductive layer to substantially remove the horizontal portions of said conformal layer while leaving said opening with a substantially vertical said conformal conductive layer on the designated sides of said opening; heating said body and said layered structure at a suitable temperature to cause dopant of a second conductivity to diffuse into said body from said conformal conductive layer to form said source and drain regions and first insulator layer upon the surface of the said first conductive layer and said conformal conductor layer; forming a second insulator layer over said vertical conformal conductive layer; forming a gate dielectric on the surface of said semiconductor body between the said source and drain region; forming a gate conductive layer over said gate dielectric; forming electrical contacts to said patterned first conductive layer through said first insulator layer which effectively makes electrical contacts to said source and drain regions through said first patterned conductive layer and said vertical conformal conductive layers; and forming an electrical contact to said gate conductive layer.