Dram with FET stacked over capacitor

Claim 1

A semiconductor memory which is formed in a semiconductor substrate comprising: capacitors for storing information and insulated-gate field effect transistors for reading out the signal charges stored in said capacitors, wherein the capacitors each include electrodes formed at the sidewalls of a recess provided in the semiconductor substrate, wherein the sidewalls of the recess are covered by an insulating layer and a layer of conductive material is formed over said insulating material to form a capacitor plate separated from said sidewalls of the recess by said insulating layer, and wherein different sidewalls of the recess form electrodes for memory cells which are independent of one another so that the electrodes formed by said sidewalls of said recess form respective capacitors for said independent memory cells, wherein a source or drain of each of said insulated-gate field effect transistors is connected to one of said electrodes of the recess, wherein a drain or source of each of said insulated-gate field effect transistors is connected to a data line, wherein a gate electrode of each of said insulated-gate field effect transistors is connected to a word line, and wherein each said insulated-gate field effect transistors is formed respectively on one of said capacitors.