Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
152 words
A semiconductor integrated circuit comprising a monocrystalline silicon body having a major surface oriented in a 110 crystallographic plane, and having therein: a. an active semiconductor electronic device; b. a capacitor comprising: 1. an electrically isolated portion of said semiconductor body having a plurality of spaced, parallel grooves therein the sidewalls of which lie substantially in 111 crystallographic planes, each groove having a length/width ratio less than 20, two of said 111 sidewalls being perpendicular to said 110 surface, and the other two 111 sidewalls sloping from the groove ends to a central v-shaped bottom; 2. a layer of dielectric material coating said portion having said grooves therein; 3. a layer of conductive material overlying and coating said dielectric layer; and c. electrical contacts interconnecting said electronic device to said conductive material and to said isolated portion, said capacitor having a per unit area capacitance of at least 2.0 pf/mil 2 .
Claim 2
Dependent Claim
152 words
A semiconductor integrated circuit comprising a monocrystalline silicon body having a major surface oriented in a 110 crystallographic plane, and having therein: a. an active semiconductor electronic device; b. a capacitor comprising: 1. an electrically isolated portion of said semiconductor body having a plurality of spaced, parallel grooves therein the sidewalls of which lie substantially in 111 crystallographic planes, each groove having a length/width ratio less than 20, two of said 111 sidewalls being perpendicular to said 110 surface, and the other two 111 sidewalls sloping from the groove ends to a central v-shaped bottom; 2. a layer of dielectric material coating said portion having said grooves therein; 3. a layer of conductive material overlying and coating said dielectric layer; and c. electrical contacts interconnecting said electronic device to said conductive material and to said isolated portion, said capacitor having a per unit area capacitance of at least 2.0 pf/mil 2 .
Claim 3
Dependent Claim
138 words
A semiconductor integrated circuit comprising a monocrystalline silicon body of one conductivity type having a major surface lying parallel to a 110 crystallographic plane, and having therein: a. active semiconductor devices; b. a capacitor comprising: 1. an electrically isolated portion of said semiconductor body having a plurality of selectively spaced parallel grooves lying therein, the sidewalls of which are crystallographically oriented parallel to 111 planes, two of said 111 sidewalls being perpendicular to said 110 surface and the other two 111 sidewalls sloping from the groove ends to a central V-shaped groove bottom; 2. a layer of silicon of opposite conductivity type coating said electrically isolated portions, and 3. a layer of conductive material overlying and coating said layer of opposite conductivity type; and c. electrical contacts interconnecting said electronic devices and said portion and said conductive layer.
Claim 4
Dependent Claim
138 words
A semiconductor integrated circuit comprising a monocrystalline silicon body of one conductivity type having a major surface lying parallel to a 110 crystallographic plane, and having therein: a. active semiconductor devices; b. a capacitor comprising: 1. an electrically isolated portion of said semiconductor body having a plurality of selectively spaced parallel grooves lying therein, the sidewalls of which are crystallographically oriented parallel to 111 planes, two of said 111 sidewalls being perpendicular to said 110 surface and the other two 111 sidewalls sloping from the groove ends to a central V-shaped groove bottom; 2. a layer of silicon of opposite conductivity type coating said electrically isolated portions, and 3. a layer of conductive material overlying and coating said layer of opposite conductivity type; and c. electrical contacts interconnecting said electronic devices and said portion and said conductive layer.
Claim 5
Dependent Claim
31 words
The circuit of claim 2 wherein said layer of conductive material is discontinuous, having selectively positioned voids therein to electricaly isolate selected portions of said layer of conductor overlying selected grooves.
Claim 6
Dependent Claim
26 words
The circuit of claim 3 further including a second conductive layer selectively interconnecting said discontinuous layer of conductive material to provide a programmable high value capacitor.
Claim 7
Dependent Claim
92 words
A semiconductor high value capacitor comprising: a. a semiconductor substrate having a major surface oriented in a 110 plane; b. selectively spaced, parallel grooves in said surface crystallographically oriented such that the groove sidewalls are aligned with 111 planes, two of said sidewalls being perpendicular to said 110 surface and the other two 111 sidewalls sloping from the groove ends to a central V-shaped bottom; c. a layer of dielectric material coating said surfce; d. a layer of conductor overlying and coating said dielectric layer and adapted to receive an electrical contact.
Claim 8
Dependent Claim
92 words
A semiconductor high value capacitor comprising: a. a semiconductor substrate having a major surface oriented in a 110 plane; b. selectively spaced, parallel grooves in said surface crystallographically oriented such that the groove sidewalls are aligned with 111 planes, two of said sidewalls being perpendicular to said 110 surface and the other two 111 sidewalls sloping from the groove ends to a central V-shaped bottom; c. a layer of dielectric material coating said surfce; d. a layer of conductor overlying and coating said dielectric layer and adapted to receive an electrical contact.
Claim 9
Dependent Claim
31 words
The capacitor of claim 5 wherein said layer of conductor is discontinuous, having selectively positioned voids therein to electrically isolate selective portions of said layer of conductor overlying said selected grooves.
Claim 10
Dependent Claim
34 words
The capacitor of claim 6 further including a second conductive layer selectively interconnecting said discontinuous layer of conductor and means for selectively interconnecting said selected portions to provide a programmable tunable high value capacitor.