Method of fabricating high density CMOS devices

Claim 1

A method of forming complementary metal oxide semiconductor transistors with self-aligned field regions comprising the steps of: A. providing on a silicon substrate first and second spaced apart areas for said complementary metal oxide semiconductor transistors, wherein a layer of photoresistive material covers each of said spaced apart areas, said photoresistive layers being substantially coplanar; B. forming a masking member on said substrate protecting the first of said areas and exposing the second; C. doping the second area with a p-type material; D. increasing the size of the unmasked area to a size defining a p-well region surrounding the second area; E. forming the p-well region; F. doping the p-well region with additional p-type material, thereby defining said self-aligned field regions; and G. fabricating complementary metal oxide semiconductor transistors in said first and second spaced apart areas.

Claim 2

A method of forming complementary metal oxide semiconductor transistors with self-aligned field regions comprising the steps of: A. providing on a silicon substrate first and second spaced apart areas for said complementary metal oxide semiconductor transistors, wherein a layer of photoresistive material covers each of said spaced apart areas, said photoresistive layers being substantially coplanar; B. forming a masking member on said substrate protecting the first of said areas and exposing the second; C. doping the second area with a p-type material; D. increasing the size of the unmasked area to a size defining a p-well region surrounding the second area; E. forming the p-well region; F. doping the p-well region with additional p-type material, thereby defining said self-aligned field regions; and G. fabricating complementary metal oxide semiconductor transistors in said first and second spaced apart areas.

Claim 9

A method of forming complementary metal oxide semiconductor transistors with self-aligned field regions comprising the steps of: A. providing on a silicon substrate first and second spaced apart areas; B. selectively applying silicon nitride to said first and second areas; C. applying a field oxide over said silicon substrate; D. applying an etchable material over said field oxide; E. selectively etching said etchable material to expose the oxide and nitride in said second area; F. doping the exposed second area with a p-type material; G. further etching said etchable material to a size defining a p-well region surrounding said second area; H. forming the p-well region; I. removing substantially all of the remaining etchable material; J. uniformly applying p-type material to the substrate which passes into the substrate in the p-well region but not in regions covered with oxide and silicon nitride; and K. fabricating complementary metal oxide semiconductor transistors in said first and second spaced apart areas.

Claim 10

A method of forming complementary metal oxide semiconductor transistors with self-aligned field regions comprising the steps of: A. providing on a silicon substrate first and second spaced apart areas; B. selectively applying silicon nitride to said first and second areas; C. applying a field oxide over said silicon substrate; D. applying an etchable material over said field oxide; E. selectively etching said etchable material to expose the oxide and nitride in said second area; F. doping the exposed second area with a p-type material; G. further etching said etchable material to a size defining a p-well region surrounding said second area; H. forming the p-well region; I. removing substantially all of the remaining etchable material; J. uniformly applying p-type material to the substrate which passes into the substrate in the p-well region but not in regions covered with oxide and silicon nitride; and K. fabricating complementary metal oxide semiconductor transistors in said first and second spaced apart areas.