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US4045259A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for fabricating diffused complementary field effect transistors

Assignee: Harris Corp
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Filing: 1976-10-26
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Granted: 1977-08-30
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Expires: 1996-10-26
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Abstract

Abstract In a process for fabricating complementary FETS, wherein a first insulative layer has apertures therein, a second insulative layer doped with N-type impurities is formed over the area in which an N channel device is to be formed and is diffused in a non-oxidizing atmosphere through apertures in the first insulative layer to form the source and drain of an N channel device. Immediately thereafter, an atmosphere containing a P-type impurity is introduced to deposit and diffuse P-type impurities through exposed apertures in the first insulative layer to form the source and drain of a P channel device.

Inventors

  • 👤 Thomas J. Sanders

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 20:27
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10P; H10P32/00; H10P32/10; H10P32/12; H10P32/14; H10P32/1408; H10P32/141; H10P32/17; H10P32/171

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 129 words
In a process for fabricating complementary field effect transistors wherein source and drain apertures are provided through a first insulative layer superimposed on a substrate and each source and drain aperture are separated by a gate superimposed on said substrate, the improvement comprising: forming unselectively a second insulative layer doped with N-type impurities; selectively removing a portion of said second insulative layer to exposed apertures in which a P channel device is to be formed; diffusing said N-type impurities from said second insulative layer into said substrate in a nonoxidizing atmosphere to form an N channel device; and subsequently changing said nonoxidizing atmosphere to an atmosphere containing P-type impurities to diffuse P-type impurities through said exposed apertures to form said P channel device and further diffuse said N-type impurities.
Claim 2
Dependent Claim 129 words
In a process for fabricating complementary field effect transistors wherein source and drain apertures are provided through a first insulative layer superimposed on a substrate and each source and drain aperture are separated by a gate superimposed on said substrate, the improvement comprising: forming unselectively a second insulative layer doped with N-type impurities; selectively removing a portion of said second insulative layer to exposed apertures in which a P channel device is to be formed; diffusing said N-type impurities from said second insulative layer into said substrate in a nonoxidizing atmosphere to form an N channel device; and subsequently changing said nonoxidizing atmosphere to an atmosphere containing P-type impurities to diffuse P-type impurities through said exposed apertures to form said P channel device and further diffuse said N-type impurities.
Claim 3
Dependent Claim 19 words
The process of claim 1 wherein said N-type and P-type diffusion steps are performed in sequence without intervening steps.
Claim 4
Dependent Claim 28 words
The process of claim 2 wherein said N-type and P-type diffusion steps are performed in a diffusion furnace without removing the composite structure said furnace between diffusion steps.
Claim 5
Dependent Claim 22 words
The process of claim 1 wherein said N-type impurity has a slower coefficient of diffusion in said substrate than said P-type impurity.
Claim 6
Dependent Claim 17 words
The process of claim 4 wherein said N-type impurity is arsenic and said P-type impurity is boron.
Claim 7
Dependent Claim 30 words
The process of claim 1 wherein said first N-type diffusion step is performed in a first diffusion furnace and said P-type diffusion step is performed in a second diffusion furnace.
Claim 8
Dependent Claim 121 words
In a process for fabricating complementary field effect transistors by diffusion to form the source and drain regions in a substrate, the improvement comprising: forming a masking layer on said substrate with apertures to expose the areas of said substrate in which said source and drain regions are to be formed; forming an insulative layer doped with N-type impurities over the area in which the source and drain regions of an N channel device is to be formed; diffusing in a nonoxidizing atmosphere said N-type impurities from said doped insulative layer into said substrate to form said N channel device; and immediately thereafter introducing a P-type impurity atmosphere to diffuse P-type impurities through exposed apertures to form a P channel device.
Claim 9
Dependent Claim 121 words
In a process for fabricating complementary field effect transistors by diffusion to form the source and drain regions in a substrate, the improvement comprising: forming a masking layer on said substrate with apertures to expose the areas of said substrate in which said source and drain regions are to be formed; forming an insulative layer doped with N-type impurities over the area in which the source and drain regions of an N channel device is to be formed; diffusing in a nonoxidizing atmosphere said N-type impurities from said doped insulative layer into said substrate to form said N channel device; and immediately thereafter introducing a P-type impurity atmosphere to diffuse P-type impurities through exposed apertures to form a P channel device.
Claim 10
Dependent Claim 47 words
The process of claim 7 wherein said doped insulative layer is formed by non-selectively forming said doped insulative layer on said masking layer and then removing a portion of said doped insulative layer to expose the apertures in which said P channel device is to be formed.
Claim 11
Dependent Claim 71 words
The process of claim 7 wherein said masking layer is a first insulative layer on said substrate having source and drain apertures, said doped insulative layer is a second insulative layer covering said source and drain regions and the gate of said N channel devices, and a third insulative layer is formed covering said source and drain regions and the gate of said P channel device during the final diffusion step.
Claim 12
Dependent Claim 19 words
The process of claim 7 wherein said N-type and P-type diffusion steps are performed in sequence without intervening steps.
Claim 13
Dependent Claim 29 words
The process of claim 10 wherein said N-type and P-type diffusion steps are performed in a diffusion furnace without removing the composite structure from said furnace between diffusion steps.
Claim 14
Dependent Claim 22 words
The process of claim 7 wherein said N-type impurity has a slower coefficient of diffusion in said substrate than said P-type impurity.
Claim 15
Dependent Claim 53 words
The process of claim 7 wherein said masking layer is an insulative layer on said substrate with openings to expose the area in which the N and P channel devices are to be formed and a gate on said substrate in said openings to define said apertures for said source and drain areas.
Claim 16
Dependent Claim 30 words
The process of claim 7 wherein said first N-type diffusion step is performed in a first diffusion furnace and said P-type diffusion step is performed in a second diffusion furnace.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-08-29 1981-02-28 1981-08-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-08-29 1985-02-28 1985-08-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-08-29 1989-02-28 1989-08-30 $7700.00 Window Closed / Lapsed

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