Production of mis integrated devices with high inversion voltage to threshold voltage ratios

Claim 1

A METHOD OF TREATING AN MISFET DEVICE COMPRISING THE STEPS OF: A. FORMING DIRECTLY ON A SURFFACE OF A FIRST CONDUCTIVELY TYPE SEMICONDUCTING SUBSTRATE FIRST AND SECOND OXIDE LAYERS RESPECTIVELY INTERFACING WITH FIRST AND SECOND REGIONS OF SAID SURFACE AND RESPECTIVELY CONTAINING SECOND AND FIRST CONDUCTIVITY TYPE IMPURITIES, SAID FIRST REGION BEING CONTIGUOUSLY SURROUNDED BY SAID SECOND REGION AND ITSELF INCLUDING A PAIR OF SPACED APART AREAS BETWEEN WHICH SAID SURFACE IS FREE OF BOTH OF SAID LAYERS, AND B. RAISING THE TEMPERATURE OF SAID SUBSTRATE AND OF SAID LAYERS THEREON SO AS TO DIFFUSE THE IMPURITIES FROM SAID FIRST LAYER INTO SAID SPACED APART AREAS, THEREBY FORMING SECOND CONDUCTIVITY TYPE SOURCE AND DRAIN REGIONS THEREIN AND SO AS TO SIMULTANEOUSLY DIFFUSE THE IMPURITIES FROM SAID SECOND LAYER INTO SAID SURROUNDING SECOND REGION, THEREBY FORMING INCREASED FIRST CONDUCTIVITY TYPE FIELD REGIONS THEREIN, WITHOUT THEREBY DOPING SAID CHANNEL REGION.

Claim 2

A METHOD OF TREATING AN MISFET DEVICE COMPRISING THE STEPS OF: A. FORMING DIRECTLY ON A SURFFACE OF A FIRST CONDUCTIVELY TYPE SEMICONDUCTING SUBSTRATE FIRST AND SECOND OXIDE LAYERS RESPECTIVELY INTERFACING WITH FIRST AND SECOND REGIONS OF SAID SURFACE AND RESPECTIVELY CONTAINING SECOND AND FIRST CONDUCTIVITY TYPE IMPURITIES, SAID FIRST REGION BEING CONTIGUOUSLY SURROUNDED BY SAID SECOND REGION AND ITSELF INCLUDING A PAIR OF SPACED APART AREAS BETWEEN WHICH SAID SURFACE IS FREE OF BOTH OF SAID LAYERS, AND B. RAISING THE TEMPERATURE OF SAID SUBSTRATE AND OF SAID LAYERS THEREON SO AS TO DIFFUSE THE IMPURITIES FROM SAID FIRST LAYER INTO SAID SPACED APART AREAS, THEREBY FORMING SECOND CONDUCTIVITY TYPE SOURCE AND DRAIN REGIONS THEREIN AND SO AS TO SIMULTANEOUSLY DIFFUSE THE IMPURITIES FROM SAID SECOND LAYER INTO SAID SURROUNDING SECOND REGION, THEREBY FORMING INCREASED FIRST CONDUCTIVITY TYPE FIELD REGIONS THEREIN, WITHOUT THEREBY DOPING SAID CHANNEL REGION.

Claim 3

A method of treating an MOSFET device the steps of: a. forming a pair of spaced apart source and drain regions in a semiconducting substrate, said substrate and said regions being doped to have first and second conductivity types respectively; b. forming an oxide layer directly on said surface, said oxide layer containing impurities of the same conductivity type as said substrate, extending onto and interfacing with said source and drain regions, but leaving exposed the substrate surface which extends between said regions; and c. diffusing said impurities from said first named layer into said substrate by heating said substrate and said oxide layer, without thereby doping said exposed substrate surface.

Claim 4

A method of treating an MOSFET device the steps of: a. forming a pair of spaced apart source and drain regions in a semiconducting substrate, said substrate and said regions being doped to have first and second conductivity types respectively; b. forming an oxide layer directly on said surface, said oxide layer containing impurities of the same conductivity type as said substrate, extending onto and interfacing with said source and drain regions, but leaving exposed the substrate surface which extends between said regions; and c. diffusing said impurities from said first named layer into said substrate by heating said substrate and said oxide layer, without thereby doping said exposed substrate surface.

Claim 5

A method of treating a complementary MOSFET device having first and second conductivity type portions disposed in a semiconducting substrate along a common surface thereof, with respective portions containing pairs of source and drain regions at spaced apart positions and of a conductivity type opposite that of said respective portions, the steps of: a. forming directly on said surface first and second oxide layers, said first layer containing a first conductivity type portion and overlapping the outer borders of the positions of the source and drain regions therein while leaving the substrate surface between said positions exposed, said second layer containing second conductivity type impurity and extending over said second conductivity type portion and overlapping the outer borders of the positions of the source and drain regions therein while leaving the substrate surface between said positions exposed; and b. heating said substrate and said layers so as to diffuse impurities from said layers into the said substrate surface directly under then, without thereby doping said exposed substrate surface.

Claim 6

A method of treating a complementary MOSFET device having first and second conductivity type portions disposed in a semiconducting substrate along a common surface thereof, with respective portions containing pairs of source and drain regions at spaced apart positions and of a conductivity type opposite that of said respective portions, the steps of: a. forming directly on said surface first and second oxide layers, said first layer containing a first conductivity type portion and overlapping the outer borders of the positions of the source and drain regions therein while leaving the substrate surface between said positions exposed, said second layer containing second conductivity type impurity and extending over said second conductivity type portion and overlapping the outer borders of the positions of the source and drain regions therein while leaving the substrate surface between said positions exposed; and b. heating said substrate and said layers so as to diffuse impurities from said layers into the said substrate surface directly under then, without thereby doping said exposed substrate surface.

Claim 8

A method of treating a complementary MOSFET device in a semiconducting substrate having first and second conductivity type portions disposed along a common surface thereof, the steps of: a. forming a pattern of oxide layers directly on said surface, said pattern including first and second oxidE layers over said first and second conductivity type portions respectively upon said surface, said layers containing second and first conductivity type impurities respectively and each layer comprising two spaced apart portions between which the substrate surface is exposed, a third oxide layer containing a first conductivity type impurity over said first conductivity type substrate portion, contiguously to and surrounded by said first oxide layer, and a fourth oxide layer containing a second conductivity type impurity over said second substrate portion, contiguously to and surrounded by said second oxide layer; and b. heating said substrate and the layers thereon so as to cause the impurities from said layers to diffuse into said substrate surface so as to create therein respective source and drain pairs under said third and fourth oxide layers, surrounded by respective doped field regions under said first and second oxide layers, without thereby doping said exposed substrate surface.

Claim 9

A method of treating a complementary MOSFET device in a semiconducting substrate having first and second conductivity type portions disposed along a common surface thereof, the steps of: a. forming a pattern of oxide layers directly on said surface, said pattern including first and second oxidE layers over said first and second conductivity type portions respectively upon said surface, said layers containing second and first conductivity type impurities respectively and each layer comprising two spaced apart portions between which the substrate surface is exposed, a third oxide layer containing a first conductivity type impurity over said first conductivity type substrate portion, contiguously to and surrounded by said first oxide layer, and a fourth oxide layer containing a second conductivity type impurity over said second substrate portion, contiguously to and surrounded by said second oxide layer; and b. heating said substrate and the layers thereon so as to cause the impurities from said layers to diffuse into said substrate surface so as to create therein respective source and drain pairs under said third and fourth oxide layers, surrounded by respective doped field regions under said first and second oxide layers, without thereby doping said exposed substrate surface.