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Incorporating barrier atoms into a gate dielectric using gas cluster ion beam implantation

Assignee: Advanced Micro Devices Inc
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Filing: 1998-05-14
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Granted: 2000-09-26
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Expires: 2018-05-14
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Abstract

Abstract An integrated circuit fabrication process is provided for incorporating barrier atoms, preferably N atoms, within a gate dielectric/silicon-based substrate interfacial region using gas cluster ion beam implantation. Gas cluster ion beam implantation involves supercooling a gas to form clusters of atoms from the molecules in the gas. Those clusters of atoms are then ionized and accelerated to a target. Upon striking the target, the clusters of atoms break up into individual atoms. The energy of the ionized cluster is uniformly distributed to the individual atoms. As such, the atoms have a relatively low energy, and thus may be implanted to a shallow depth of less than 100 Å. Barrier atoms positioned within a gate dielectric/substrate interfacial region serve to inhibit the diffusion of metal atoms and impurities from an overlying gate conductor into the substrate. Furthermore, the barrier layer provides protection against hot carrier injection into and entrapment within the gate dielectric.

Inventors

  • 👤 Mark I. Gardner
  • 👤 Mark C. Gilmer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:04
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/224; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01318; H10D64/01332; H10D64/01336; H10D64/0134; H10D64/01342; H10D64/01344; H10D64/60; H10D64/66; H10D64/667; H10D64/669; H10D64/68; H10D64/681; H10D64/685; H10D64/691; H10D64/693; H10P30/202; H10P30/204; H10P30/208; H10P32/00; H10P32/30; H10D64/665

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 52 words
An integrated circuit comprising a dielectric layer arranged across a semiconductor substrate and having a thickness of less than about 150 Å, wherein the dielectric layer comprises barrier atoms, and wherein at least most of the barrier atoms within the dielectric layer are unbonded to other barrier atoms within the dielectric layer.
Claim 2
Dependent Claim 52 words
An integrated circuit comprising a dielectric layer arranged across a semiconductor substrate and having a thickness of less than about 150 Å, wherein the dielectric layer comprises barrier atoms, and wherein at least most of the barrier atoms within the dielectric layer are unbonded to other barrier atoms within the dielectric layer.
Claim 3
Dependent Claim 24 words
The integrated circuit of claim 1, wherein the dielectric layer comprises a dielectric selected from the group consisting of silicon dioxide and silicon nitride.
Claim 4
Dependent Claim 44 words
The integrated circuit of claim 1, wherein the barrier atoms comprise nitrogen barrier atoms derived from clusters of nitrogen atoms, and wherein at least most the nitrogen barrier atoms within the dielectric layer are unbonded to other nitrogen barrier atoms within the dielectric layer.
Claim 5
Dependent Claim 24 words
The integrated circuit of claim 1, further comprising a gate dielectric having a dielectric constant greater than about 8.0 residing upon the dielectric layer.
Claim 6
Dependent Claim 16 words
The integrated circuit of claim 4, wherein the gate dielectric comprises Ta 2 O 5 .
Claim 7
Dependent Claim 45 words
The integrated circuit of claim 4, further comprising a gate conductor residing upon the gate dielectric between a pair of opposed sidewall surfaces, wherein the gate conductor comprises a material selected from the group consisting of polysilicon, titanium nitride, tungsten, iridium, and indium tin oxide.
Claim 8
Dependent Claim 58 words
The integrated circuit of claim 6, further comprising: nitride sidewall spacers extending laterally from the pair of opposed sidewall surfaces; lightly doped drain areas arranged within the semiconductor substrate directly beneath the nitride sidewall spacers; and source and drain regions arranged within the substrate laterally adjacent the lightly doped drain areas a spaced distance from the gate conductor.
Claim 9
Dependent Claim 73 words
An integrated circuit comprising an oxynitride barrier layer interposed between a semiconductor substrate and a gate dielectric comprising an oxygen-containing compound, wherein a combined thickness of the oxynitride barrier layer and the gate dielectric is less than about 150 Å, and wherein the oxynitride barrier layer comprises nitrogen barrier atoms, and wherein the nitrogen barrier atoms within the oxynitride barrier layer are unbonded to other nitrogen barrier atoms within the oxynitride barrier layer.
Claim 10
Dependent Claim 73 words
An integrated circuit comprising an oxynitride barrier layer interposed between a semiconductor substrate and a gate dielectric comprising an oxygen-containing compound, wherein a combined thickness of the oxynitride barrier layer and the gate dielectric is less than about 150 Å, and wherein the oxynitride barrier layer comprises nitrogen barrier atoms, and wherein the nitrogen barrier atoms within the oxynitride barrier layer are unbonded to other nitrogen barrier atoms within the oxynitride barrier layer.
Claim 11
Dependent Claim 18 words
The integrated circuit of claim 8, wherein the gate dielectric comprises a dielectric constant greater than about 8.0.
Claim 12
Dependent Claim 16 words
The integrated circuit of claim 9, wherein the gate dielectric comprises Ti 2 O 5 .
Claim 13
Dependent Claim 27 words
The integrated circuit of claim 10, further comprising a TiO 2 layer residing upon the gate dielectric and a TiN layer residing upon the TiO 2 layer.
Claim 14
Dependent Claim 45 words
The integrated circuit of claim 11, further comprising a gate conductor residing upon the TiN layer between a pair of opposed sidewall surfaces, wherein the gate conductor comprises a material selected from the group consisting of polysilicon, titanium nitride, tungsten, iridium, and indium tin oxide.
Claim 15
Dependent Claim 58 words
The integrated circuit of claim 12, further comprising: nitride sidewall spacers extending laterally from the pair of opposed sidewall surfaces; lightly doped drain areas arranged within the semiconductor substrate directly beneath the nitride sidewall spacers; and source and drain regions arranged within the substrate laterally adjacent the lightly doped drain areas a spaced distance from the gate conductor.
Claim 16
Dependent Claim 17 words
The integrated circuit of claim 8, wherein the oxynitride layer consists essentially of silicon, oxygen, and nitrogen.
Claim 17
Dependent Claim 29 words
The integrated circuit of claim 14, wherein the nitrogen within the oxynitride layer includes nitrogen barrier atoms that are unbonded to other nitrogen barrier atoms within the oxynitride layer.
Claim 18
Dependent Claim 26 words
The integrated circuit of claim 1, wherein all of the barrier atoms within the dielectric layer are unbonded to other barrier atoms within the dielectric layer.
Claim 19
Dependent Claim 28 words
The integrated circuit of claim 3, wherein all of the nitrogen barrier atoms within the dielectric layer are unbonded to other nitrogen barrier atoms within the dielectric layer.

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Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-09-26 2004-03-27 2004-09-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-09-26 2008-03-27 2008-09-26 $3760.00 Window Closed / Lapsed
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