US5970352A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Field effect transistor having elevated source and drain regions and methods for manufacturing the same
Assignee: Toshiba Corp
•
Filing: 1998-04-23
•
Granted: 1999-10-19
•
Expires: 2018-04-23
Abstract
Abstract A field effect transistor is manufactured by forming an isolating structure on a semiconductor substrate to define an active area. A gate structure is formed which is insulated from a surface of the active area of the semiconductor substrate. An amorphous silicon film is formed on the gate structure, on the surface of the semiconductor substrate, and on the isolating structure. A first portion of the amorphous silicon film is converted to an epitaxial film and a second portion of the amorphous silicon film is converted to a polysilicon film. Impurities are diffused throughout the polysilicon film and into an upper surface portion of said epitaxial film. The impurity doped polysilicon film and the upper surface portion of the epitaxial film are oxidized to form oxide films and the oxide films are removed so that the epitaxial film remains at least on the active area of the semiconductor substrate. Source and drain regions of the transistor are formed in the active area of the semiconductor substrate.
Inventors
- 👤 Jun-ichi Shiozawa
- 👤 Yoshitaka Tsunashima
- 👤 Katsuya Okumura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:41
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0275; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/0698
Claims Analysis
Total Claims: 43
Claim 1
Independent Claim
164 words
A method of manufacturing a field effect transistor, comprising the steps of: forming an isolating structure on a semiconductor substrate of a first conductivity type to define an active area; forming a gate structure which is insulated from a surface of the active area of said semiconductor substrate; forming an amorphous silicon film on said gate structure, on the surface of said semiconductor substrate, and on said isolating structure; converting a first portion of said amorphous silicon film to an epitaxial film and a second portion of said amorphous silicon film to a polysilicon film; diffusing impurities throughout said polysilicon film and into an upper surface portion of the film; oxidizing said polysilicon film and said upper surface portion of said epitaxial film to form oxide films; removing said oxide films so that said epitaxial film remains at least on the active area of said semiconductor substrate; and forming source and drain regions of said transistor in the active area of said semiconductor substrate.
Claim 2
Independent Claim
164 words
A method of manufacturing a field effect transistor, comprising the steps of: forming an isolating structure on a semiconductor substrate of a first conductivity type to define an active area; forming a gate structure which is insulated from a surface of the active area of said semiconductor substrate; forming an amorphous silicon film on said gate structure, on the surface of said semiconductor substrate, and on said isolating structure; converting a first portion of said amorphous silicon film to an epitaxial film and a second portion of said amorphous silicon film to a polysilicon film; diffusing impurities throughout said polysilicon film and into an upper surface portion of the film; oxidizing said polysilicon film and said upper surface portion of said epitaxial film to form oxide films; removing said oxide films so that said epitaxial film remains at least on the active area of said semiconductor substrate; and forming source and drain regions of said transistor in the active area of said semiconductor substrate.
Claim 3
Dependent Claim
27 words
The method according to claim 1, wherein said gate structure comprises a polysilicon gate electrode portion, a silicide gate electrode portion, and a gate electrode cap portion.
Claim 4
Dependent Claim
15 words
The method according to claim 2, wherein said silicide gate electrode portion comprises tungsten silicide.
Claim 5
Dependent Claim
15 words
The method according to claim 2, wherein said gate electrode cap portion comprises silicon nitride.
Claim 6
Dependent Claim
17 words
The method according to claim 1, wherein said isolating structure comprises a shallow trench isolation (STI) structure.
Claim 7
Dependent Claim
20 words
The method according to claim 1, wherein said amorphous silicon film is formed by low pressure chemical vapor deposition (LPCVD).
Claim 8
Dependent Claim
42 words
The method according to claim 6, wherein said amorphous silicon film is deposited at a temperature in a range from about 480° C. to about 550° C. and at a pressure in a range from about 0.1 Torr to about 1.0 Torr.
Claim 9
Dependent Claim
25 words
The method according to claim 1, wherein said amorphous silicon film has a thickness in a range from about 200 Å to about 300 Å.
Claim 10
Dependent Claim
22 words
The method according to claim 1, wherein said epitaxial film is arranged at least on the active area of said semiconductor substrate.
Claim 11
Dependent Claim
37 words
The method according to claim 1, wherein said epitaxial film is arranged on the active area of said semiconductor substrate, at least a portion of said isolating structure, and at least a portion of said gate structure.
Claim 12
Dependent Claim
52 words
The method according to claim 1, wherein the step of diffusing impurities into said epitaxial film and said polysilicon film comprises: forming an impurity doped film on said epitaxial film and said polysilicon film; heating to diffuse impurities to said epitaxial film and said polysilicon film; and removing said impurity doped film.
Claim 13
Dependent Claim
39 words
The method according to claim 11, wherein the heating is at a temperature in a range of about 800° C. to about 950° C. and in an ambient which is one of the group consisting of argon and nitrogen.
Claim 14
Dependent Claim
25 words
The method according to claim 1, wherein the step of diffusing impurities into said epitaxial film and said polysilicon film comprises a vapor phase deposition.
Claim 15
Dependent Claim
37 words
The method according to claim 13, wherein the vapor phase deposition is one of a group consisting of a POCl 3 vapor phase deposition, an AsH 3 vapor deposition, and a B 2 H 6 vapor deposition.
Claim 16
Dependent Claim
28 words
The method according to claim 1, wherein the selective oxidation comprises a dry oxidation process at a temperature in a range of about 700° C. and 950° C.
Claim 17
Dependent Claim
28 words
The method according to claim 1, wherein the selective oxidation comprises a wet oxidation process at a temperature in a range of about 700° C. and 950° C.
Claim 18
Dependent Claim
26 words
The method according to claim 1, wherein said oxide films are removed by one of the group consisting of diluted NH 4 F and diluted HF.
Claim 19
Dependent Claim
26 words
The method according to claim 1, wherein the thickness of the remaining epitaxial layer is in a range from about 300 Å to about 500 Å.
Claim 20
Dependent Claim
30 words
The method according to claim 1, wherein the step of forming said source/drain regions comprises: ion implanting impurities into said remaining epitaxial layer; and heating to diffuse the implanted impurities.
Claim 21
Dependent Claim
20 words
The method according to claim 19, wherein the impurities are one of the group consisting of phosphorus, arsenic, and antimony.
Claim 22
Dependent Claim
11 words
The method according to claim 19, wherein the impurities are boron.
Claim 23
Dependent Claim
33 words
The method according to claim 1, comprising the further steps of: forming an interlayer insulating film on said transistor; and forming contacts to one or both of said source/drain regions of said transistor.
Claim 24
Independent Claim
158 words
A method of manufacturing a field effect transistor, comprising the steps of: forming an isolating structure on a semiconductor substrate of a first conductivity type to define an active area; forming a gate structure which is insulated from a surface of the active area of said semiconductor substrate; forming an amorphous silicon film on said gate structure, on the surface of said semiconductor substrate, and on said isolating structure; converting a first portion of said amorphous silicon film to an epitaxial film and a second portion of said amorphous silicon film to a polysilicon film; diffusing impurities throughout said polysilicon film and into an upper surface portion of said epitaxial film; selectively removing said polysilicon film and the upper surface portion of said epitaxial film so that said epitaxial film remains at least on the active area of said semiconductor substrate; and forming source and drain regions of said transistor in the active area of said semiconductor substrate.
Claim 25
Independent Claim
158 words
A method of manufacturing a field effect transistor, comprising the steps of: forming an isolating structure on a semiconductor substrate of a first conductivity type to define an active area; forming a gate structure which is insulated from a surface of the active area of said semiconductor substrate; forming an amorphous silicon film on said gate structure, on the surface of said semiconductor substrate, and on said isolating structure; converting a first portion of said amorphous silicon film to an epitaxial film and a second portion of said amorphous silicon film to a polysilicon film; diffusing impurities throughout said polysilicon film and into an upper surface portion of said epitaxial film; selectively removing said polysilicon film and the upper surface portion of said epitaxial film so that said epitaxial film remains at least on the active area of said semiconductor substrate; and forming source and drain regions of said transistor in the active area of said semiconductor substrate.
Claim 26
Dependent Claim
27 words
The method according to claim 23, wherein said gate structure comprises a polysilicon gate electrode portion, a silicide gate electrode portion, and a gate electrode cap portion.
Claim 27
Dependent Claim
15 words
The method according to claim 24, wherein said silicide gate electrode portion comprises tungsten silicide.
Claim 28
Dependent Claim
15 words
The method according to claim 24, wherein said gate electrode cap portion comprises silicon nitride.
Claim 29
Dependent Claim
14 words
The method according to claim 23, wherein said isolating structure comprises a shallow trench.
Claim 30
Dependent Claim
20 words
The method according to claim 23, wherein said amorphous silicon film is formed by low pressure chemical vapor deposition (LPCVD).
Claim 31
Dependent Claim
42 words
The method according to claim 28, wherein said amorphous silicon film is deposited at a temperature in a range from about 480° C. to about 550° C. and at a pressure in a range from about 0.1 Torr to about 1.0 Torr.
Claim 32
Dependent Claim
25 words
The method according to claim 23, wherein said amorphous silicon film has a thickness in a range from about 200 Å to about 300 Å.
Claim 33
Dependent Claim
22 words
The method according to claim 23, wherein said epitaxial film is arranged at least on the active area of said semiconductor substrate.
Claim 34
Dependent Claim
37 words
The method according to claim 23, wherein said epitaxial film is arranged on the active area of said semiconductor substrate, at least a portion of said isolating structure, and at least a portion of said gate structure.
Claim 35
Dependent Claim
52 words
The method according to claim 23, wherein the step of diffusing impurities into said epitaxial film and said polysilicon film comprises: forming an impurity doped film on said epitaxial film and said polysilicon film; heating to diffuse impurities to said epitaxial film and said polysilicon film; and removing said impurity doped film.
Claim 36
Dependent Claim
39 words
The method according to claim 33, wherein the heating is at a temperature in a range of about 800° C. to about 950° C. and in an ambient which is one of the group consisting of argon and nitrogen.
Claim 37
Dependent Claim
25 words
The method according to claim 23, wherein the step of diffusing impurities into said epitaxial film and said polysilicon film comprises a vapor phase deposition.
Claim 38
Dependent Claim
37 words
The method according to claim 35, wherein the vapor phase deposition is one of a group consisting of a POCl 3 vapor phase deposition, an AsH 3 vapor deposition, and a B 2 H 6 vapor deposition.
Claim 39
Dependent Claim
26 words
The method according to claim 23, wherein the thickness of the remaining epitaxial layer is in a range from about 300 Å to about 500 Å.
Claim 40
Dependent Claim
30 words
The method according to claim 23, wherein the step of forming said source/drain regions comprises: ion implanting impurities into said remaining epitaxial layer; and heating to diffuse the implanted impurities.
Claim 41
Dependent Claim
11 words
The method according to claim 38, wherein the impurities are boron.
Claim 42
Dependent Claim
20 words
The method according to claim 38, wherein the impurities are one of the group consisting of phosphorous, arsenic, and antimony.
Claim 43
Dependent Claim
33 words
The method according to claim 23, comprising the further steps of: forming an interlayer insulating film on said transistor; and forming contacts to one or both of said source/drain regions of said transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-10-18 | 2003-04-19 | 2003-10-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-18 | 2007-04-19 | 2007-10-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-10-18 | 2011-04-19 | 2011-10-19 | $7700.00 | Window Closed / Lapsed |