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US5336903A Expired / Lapsed US ⏱️ 0.0 years remaining

Selective deposition of doped silicon-germanium alloy on semiconductor substrate, and resulting structures

Assignee: INTELLECTUAL PROPERTY VENTURES LLC
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Filing: 1993-05-28
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Granted: 1994-08-09
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Expires: 2013-05-28
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Abstract

Abstract Doped silicon-germanium alloy is selectively deposited on a semiconductor substrate, and the semiconductor substrate is then heated to diffuse at least some of the dopant from the silicon-germanium alloy into the semiconductor substrate to form a doped region at the face of the semiconductor substrate. The doped silicon-germanium alloy acts as a diffusion source for the dopant, so that shallow doped, regions may be formed at the face of the semiconductor substrate without ion implantation. A high performance contact to the doped region is also provided by forming a metal layer on the doped silicon-germanium alloy layer and heating to react at least part of the silicon-germanium alloy layer with at least part of the metal layer to form a layer of germanosilicide alloy over the doped regions. The method of the present invention is particularly suitable for forming shallow source and drain regions for a field effect transistor, and self-aligned source and drain contacts therefor.

Inventors

  • 👤 Mehmet C. Ozturk
  • 👤 Douglas T. Grider
  • 👤 Mahesh K. Sanganeria
  • 👤 Stanton P. Ashburn
  • 👤 Jimmie J. Wortman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 13:08
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/017; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S148/00; Y10S148/058; Y10S148/059

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 51 words
A semiconductor structure comprising: a semiconductor substrate having a face; and a layer of silicon-germanium alloy on said face, wherein said layer of silicon-germanium alloy is doped with a predetermined dopant; and wherein said semiconductor substrate is doped with said predetermined dopant at said face, beneath said layer of silicon-germanium alloy.
Claim 2
Dependent Claim 51 words
A semiconductor structure comprising: a semiconductor substrate having a face; and a layer of silicon-germanium alloy on said face, wherein said layer of silicon-germanium alloy is doped with a predetermined dopant; and wherein said semiconductor substrate is doped with said predetermined dopant at said face, beneath said layer of silicon-germanium alloy.
Claim 3
Dependent Claim 18 words
The semiconductor structure of claim 1 wherein said layer of silicon-germanium alloy comprises a layer of germanosilicide alloy.
Claim 4
Dependent Claim 79 words
A semiconductor structure comprising: a semiconductor substrate having a face; a pair of laterally spaced apart regions in said semiconductor substrate, at said face, wherein said laterally spaced apart regions are doped with a predetermined dopant; an electrode on said first face, between said pair of laterally spaced apart regions; and a layer of silicon-germanium alloy on said face, over said pair of laterally spaced apart regions, wherein said layer of silicon-germanium alloy is doped with said predetermined dopant.
Claim 5
Dependent Claim 79 words
A semiconductor structure comprising: a semiconductor substrate having a face; a pair of laterally spaced apart regions in said semiconductor substrate, at said face, wherein said laterally spaced apart regions are doped with a predetermined dopant; an electrode on said first face, between said pair of laterally spaced apart regions; and a layer of silicon-germanium alloy on said face, over said pair of laterally spaced apart regions, wherein said layer of silicon-germanium alloy is doped with said predetermined dopant.
Claim 6
Dependent Claim 18 words
The semiconductor structure of claim 3 wherein said layer of silicon-germanium alloy comprises a layer of germanosilicide alloy.
Claim 7
Dependent Claim 33 words
The semiconductor device of claim 3 wherein said pair of laterally spaced apart regions are field effect transistor source and drain regions and wherein said electrode comprises a field effect transistor gate electrode.
Claim 8
Dependent Claim 25 words
The semiconductor structure of claim 5 wherein said electrode includes a top; said semiconductor device further comprising a layer of silicon-germanium alloy on said top.
Claim 9
Dependent Claim 24 words
The semiconductor structure of claim 6 wherein said layer of silicon-germanium alloy on said top comprises a layer of germanosilicide alloy on said top.
Claim 10
Dependent Claim 102 words
A field effect transistor comprising: a semiconductor substrate having a face; laterally spaced apart source and drain regions in said semiconductor substrate, at said face, wherein said laterally spaced apart source and drain regions are doped with a predetermined dopant; a gate electrode on said face, between said source and drain regions, said gate electrode comprising a gate insulating layer on said face and a gate conductor on said gate insulating layer, opposite said face; and a layer of silicon-germanium alloy on said face, over said source and drain regions, wherein said layer of silicon-germanium alloy is doped with said predetermined dopant.
Claim 11
Dependent Claim 102 words
A field effect transistor comprising: a semiconductor substrate having a face; laterally spaced apart source and drain regions in said semiconductor substrate, at said face, wherein said laterally spaced apart source and drain regions are doped with a predetermined dopant; a gate electrode on said face, between said source and drain regions, said gate electrode comprising a gate insulating layer on said face and a gate conductor on said gate insulating layer, opposite said face; and a layer of silicon-germanium alloy on said face, over said source and drain regions, wherein said layer of silicon-germanium alloy is doped with said predetermined dopant.
Claim 12
Dependent Claim 19 words
The field effect transistor of claim 8 wherein said layer of silicon-germanium alloy comprises a layer of germanosilicide alloy.
Claim 13
Dependent Claim 26 words
The field effect transistor of claim 8 wherein said gate insulating layer comprises a layer of silicon dioxide and wherein said gate conductor comprises polycrystalline silicon.
Claim 14
Dependent Claim 23 words
The field effect transistor of claim 8 further comprising a layer of silicon-germanium alloy on said gate conductor, opposite said gate insulating layer.
Claim 15
Dependent Claim 23 words
The field effect transistor of claim 8 further comprising a layer of germanosilicide alloy on said gate conductor, opposite said gate insulating layer.

References Cited (Backward Citations)

US4442449A Cited
US4619038A Cited
JPH03172421A Cited
US5126805A Cited
US5168072A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-08-08 1998-02-07 1998-08-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-08-08 2002-02-07 2002-08-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-08-08 2006-02-07 2006-08-09 $7700.00 Window Closed / Lapsed

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