Patent US5918149A successfully refreshed from Google Patents.
US5918149A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Deposition of a conductor in a via hole or trench
Assignee: Advanced Micro Devices Inc
•
Filing: 1996-02-16
•
Granted: 1999-06-29
•
Expires: 2016-02-16
Abstract
Abstract The present semiconductor device and method of fabrication thereof includes the provision of a trench or via hole in a dielectric, with a barrier layer thereon extending into the trench or via hole. A layer of titanium is provided over the barrier layer, also extending into the trench or via hole, and aluminum or aluminum alloy is provided over the titanium layer. The barrier layer provides good conformal coverage while also preventing outgassing of the dielectric from adversely affecting the conductor. The barrier layer also serves as a wetting agent for the deposition and flowing of aluminum or aluminum alloy. The titanium layer can be extremely thin, or non-existent, so as to avoid significant growth of TiAl 3 and the problems attendant thereto.
Inventors
- 👤 Paul R. Besser
- 👤 John A. Iacoponi
- 👤 Roger Alvis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 11:53
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/033; H10W20/40; H10W20/41; H10W20/42; H10W20/425
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
139 words
A method of fabricating a semiconductor structure on a wafer, the method comprising: providing an oxide dielectric on the wafer, said dielectric having a recess therein; heating a surface of said wafer; depositing a barrier layer of titanium nitride in said recess by a chemical vapor deposition process in which a titanium nitride source material is decomposed into titanium nitride by said heated surface of said wafer; depositing a titanium layer in said recess over said barrier layer, said titanium layer deposited by a physical vapor deposition process to a thickness of less than 200 Å; depositing an aluminum seed layer at room temperature in said recess over said titanium layer, wherein said seed layer is between 2000 and 4000Å thick; heating said wafer to 425° C. or less; and depositing a second aluminum layer over said seed layer.
Claim 2
Independent Claim
139 words
A method of fabricating a semiconductor structure on a wafer, the method comprising: providing an oxide dielectric on the wafer, said dielectric having a recess therein; heating a surface of said wafer; depositing a barrier layer of titanium nitride in said recess by a chemical vapor deposition process in which a titanium nitride source material is decomposed into titanium nitride by said heated surface of said wafer; depositing a titanium layer in said recess over said barrier layer, said titanium layer deposited by a physical vapor deposition process to a thickness of less than 200 Å; depositing an aluminum seed layer at room temperature in said recess over said titanium layer, wherein said seed layer is between 2000 and 4000Å thick; heating said wafer to 425° C. or less; and depositing a second aluminum layer over said seed layer.
Claim 3
Dependent Claim
13 words
The method of claim 1 and further providing the barrier layer comprises carbon.
Claim 4
Dependent Claim
17 words
The method of claim 1 and further providing that the titanium layer is less than 100Å thick.
Claim 5
Dependent Claim
17 words
The method of claim 1 and further providing that the titanium layer is less then 50Å thick.
Claim 6
Independent Claim
92 words
A method of fabricating a semiconductor structure on a semiconductor wafer, the method comprising: providing a dielectric having a recess therein; heating a surface of said semiconductor wafer; depositing a barrier layer including titanium and nitrogen in said recess using a chemical vapor deposition process in which a source material is decomposed into a titanium and nitrogen containing material by said heated surface of said semiconductor wafer; holding said dielectric and barrier layer at a temperature of 425° C. or greater; and providing a conductor in said recess over said barrier layer.
Claim 7
Independent Claim
92 words
A method of fabricating a semiconductor structure on a semiconductor wafer, the method comprising: providing a dielectric having a recess therein; heating a surface of said semiconductor wafer; depositing a barrier layer including titanium and nitrogen in said recess using a chemical vapor deposition process in which a source material is decomposed into a titanium and nitrogen containing material by said heated surface of said semiconductor wafer; holding said dielectric and barrier layer at a temperature of 425° C. or greater; and providing a conductor in said recess over said barrier layer.
Claim 8
Dependent Claim
14 words
The method of claim 5 and further providing the barrier layer is titanium nitride.
Claim 9
Dependent Claim
13 words
The method of claim 5 and further providing the barrier layer comprises carbon.
Claim 10
Independent Claim
92 words
A method of fabricating a semiconductor structure on a semiconductor wafer, the method comprising: providing a dielectric having a recess therein; heating a surface of said semiconductor wafer; depositing a barrier layer including titanium and nitrogen in said recess using a chemical vapor deposition process in which a source material is decomposed into a titanium and nitrogen containing material by said heated surface of said semiconductor wafer; holding said dielectric and barrier layer at a temperature of 350° C. or greater; and providing a conductor in said recess over said barrier layer.
Claim 11
Independent Claim
92 words
A method of fabricating a semiconductor structure on a semiconductor wafer, the method comprising: providing a dielectric having a recess therein; heating a surface of said semiconductor wafer; depositing a barrier layer including titanium and nitrogen in said recess using a chemical vapor deposition process in which a source material is decomposed into a titanium and nitrogen containing material by said heated surface of said semiconductor wafer; holding said dielectric and barrier layer at a temperature of 350° C. or greater; and providing a conductor in said recess over said barrier layer.
Claim 12
Independent Claim
74 words
A method of fabricating a semiconductor structure on a wafer, the method comprising: providing an oxide dielectric having a recess therein; heating a surface of said wafer; depositing a barrier layer of titanium nitride in said recess by a chemical vapor deposition process in which a titanium nitride source material is decomposed into titanium nitride by said heated surface of said wafer; and depositing an aluminum layer in said recess over said barrier layer.
Claim 13
Independent Claim
74 words
A method of fabricating a semiconductor structure on a wafer, the method comprising: providing an oxide dielectric having a recess therein; heating a surface of said wafer; depositing a barrier layer of titanium nitride in said recess by a chemical vapor deposition process in which a titanium nitride source material is decomposed into titanium nitride by said heated surface of said wafer; and depositing an aluminum layer in said recess over said barrier layer.
Claim 14
Dependent Claim
22 words
The method of claim 9, wherein said aluminum layer comprises a seed layer and a second aluminum layer over said seed layer.
Claim 15
Dependent Claim
16 words
The method of claim 10, wherein said seed layer is between 2000 and 4000 Å thick.
Claim 16
Dependent Claim
20 words
The method of claim 10, wherein said seed layer is deposited at a temperature of less than approximately 100° C.
Claim 17
Dependent Claim
21 words
The method of claim 10, wherein said wafer is maintained at less than 425° C. while depositing said second aluminum layer.
Claim 18
Dependent Claim
20 words
The method of claim 13, wherein said wafer is maintained at approximately 350° C. while depositing said second aluminum layer.
Claim 19
Dependent Claim
18 words
The method of claim 9, further comprising depositing a titanium layer in said recess over said barrier layer.
Claim 20
Dependent Claim
20 words
The method of claim 15, further comprising cooling said wafer to below 100° C. prior to depositing said aluminum layer.
Claim 21
Dependent Claim
21 words
The method of claim 9, wherein said chemical vapor deposition comprises passing a carrier gas through tetrakis dimethyl amino titanium liquid.
Claim 22
Dependent Claim
21 words
The method of claim 1, wherein said chemical vapor deposition comprises passing a carrier gas through tetrakis dimethyl amino titanium liquid.
References Cited (Backward Citations)
US4673623A
Cited
US4823182A
Cited
EP0387835A2
Cited
US5071714A
Cited
JPH04120727A
Cited
US5290731A
Cited
US5380678A
Cited
EP0525637A1
Cited
EP0552968A2
Cited
US5240880A
Cited
US5317187A
Cited
US5371042A
Cited
EP0598422A1
Cited
US5627102A
Cited
US5385867A
Cited
US5246881A
Cited
US5418388A
Cited
US5360995A
Cited
US5543357A
Cited
EP0716447A2
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-06-28 | 2002-12-28 | 2003-06-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-28 | 2006-12-28 | 2007-06-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-28 | 2010-12-28 | 2011-06-29 | $7700.00 | Window Closed / Lapsed |