US5360995A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Buffered capped interconnect for a semiconductor device
Assignee: Texas Instruments Inc
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Filing: 1993-09-14
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Granted: 1994-11-01
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Expires: 2013-09-14
Abstract
Abstract Via reliability failure in ULSI devices having aluminum leads is significantly reduced by forming a thin layer of metal, such as Ti, between the aluminum conductor and its antireflection coating. Heating the metal causes it to react with the aluminum and form an intermetallic coating. Via hole formation is achieved by etching. During via formation, if the etch etchs through the antireflection coating, it should stop in the intermetallic layer as opposed to etching into the underlying aluminum conductor. The thin layer of metal may be heated to form the intermetallic during planarization when curing spin on glass, or, a separate anneal may be used with planarization such as by chemical mechanical polish.
Inventors
- 👤 Carole D. Graas
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:13
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/425
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
126 words
A buffered capped interconnect for a semiconductor device, comprising: a first barrier layer; a first aluminum lead overlying the first barrier layer; a first intermetallic layer overlying the first aluminum lead; a first antireflection capping layer overlying the first intermetallic layer; an insulator overlying the first antireflection capping layer, the insulator having an opening including a top and a bottom, the bottom extending through the first antireflection layer and into the first intermetallic layer; a second barrier layer overlying the insulator and lining the opening in the insulator; a second aluminum lead overlying the second barrier layer; a second intermetallic layer overlying the second aluminum lead; a second antireflection capping layer overlying the second intermetallic layer; and a conductive plug in the opening of the insulator.
Claim 2
Dependent Claim
126 words
A buffered capped interconnect for a semiconductor device, comprising: a first barrier layer; a first aluminum lead overlying the first barrier layer; a first intermetallic layer overlying the first aluminum lead; a first antireflection capping layer overlying the first intermetallic layer; an insulator overlying the first antireflection capping layer, the insulator having an opening including a top and a bottom, the bottom extending through the first antireflection layer and into the first intermetallic layer; a second barrier layer overlying the insulator and lining the opening in the insulator; a second aluminum lead overlying the second barrier layer; a second intermetallic layer overlying the second aluminum lead; a second antireflection capping layer overlying the second intermetallic layer; and a conductive plug in the opening of the insulator.
Claim 3
Dependent Claim
20 words
The buffered capped interconnect of claim 1 wherein the first barrier layer and the first antireflection layer is titanium nitride.
Claim 4
Dependent Claim
19 words
The buffered capped interconnect of claim 2 wherein the first intermetallic layer lead is titanium aluminide, TiAl 3 .
Claim 5
Dependent Claim
13 words
The buffered capped interconnect of claim 3 wherein the conductive plug is tungsten.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-31 | 1998-05-02 | 1998-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-31 | 2002-05-02 | 2002-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-31 | 2006-05-02 | 2006-11-01 | $7700.00 | Window Closed / Lapsed |