Abstract A programmable fuse element disposed between integrated circuit elements that may be selectively joined during the manufacture or programming of an integrated circuit. The fuse element is a normally open fuse that electrically isolates the integrated circuit elements. The fuse element is comprised of a central area of conductive material insulated from the integrated circuit elements by areas of dielectric material. The integrated circuit elements and the fuse element are disposed on a thin oxide layer covering a semiconductor substrate to prevent those elements from shorting to the semiconductor substrate or to each other via the semiconductor substrate. A protective dielectric layer may be deposited over both the fuse element and the integrated circuit elements during the manufacture of the overall integrated circuit. A laser beam is used to burn through the protective layer and melts both the conductive material and the dielectric material that form the fuse element. As the fuse element melts, the conductive material contacts the integrated circuit elements thereby electrically coupling the integrated circuit elements together creating a low-resistance path.
A method for manufacturing a fuse structure for selectively joining a first integrated circuit element to a second integrated circuit element which lie in spaced apart relation on a dielectric layer disposed on a semiconductor substrate comprising: depositing a layer of dielectric material between said first and second integrated circuit elements; etching away a center region of said dielectric material so as to form a plurality of dielectric spacers abutting said first and second integrated circuit elements; depositing a conductive material between said dielectric spacers; and etching away a central portion of said conductive material so that said conductive material is thinner at its middle section than at its sides.
Claim 2
Independent Claim
110 words
A method for manufacturing a fuse structure for selectively joining a first integrated circuit element to a second integrated circuit element which lie in spaced apart relation on a dielectric layer disposed on a semiconductor substrate comprising: depositing a layer of dielectric material between said first and second integrated circuit elements; etching away a center region of said dielectric material so as to form a plurality of dielectric spacers abutting said first and second integrated circuit elements; depositing a conductive material between said dielectric spacers; and etching away a central portion of said conductive material so that said conductive material is thinner at its middle section than at its sides.
Claim 3
Dependent Claim
16 words
The method as recited in claim 1 which further comprises: depositing a protective dielectric layer overall.
Claim 4
Dependent Claim
21 words
The method as recited in claim 2 which further comprises covering said protective dielectric layer with at least one cap layer.
Claim 5
Dependent Claim
15 words
The method as recited in claim 2 wherein said protective dielectric layer comprises phospho-silicate glass.
Claim 6
Dependent Claim
14 words
The method as recited in claim 3 wherein said cap layer comprises an oxide.
Claim 7
Dependent Claim
13 words
The method as recited in claim 1 wherein said conductive material is polysilicon.
Claim 8
Dependent Claim
18 words
The method as recited in claim 1 wherein said dielectric material consists of silicon oxide or silicon nitride.