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US4413272A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor devices having fuses

Assignee: Fujitsu Ltd
•
Filing: 1980-09-03
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Granted: 1983-11-01
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Expires: 2000-09-03
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Abstract

Abstract A semiconductor memory device has fuses coated with a protecting layer. The protecting layer is selectively etched to open windows so as to expose narrow center portions of the fuses. After the opening of the center windows, the fusing operation of the fuses is carried out to open a gap in the center window portion of the fuse material. In a preferred embodiment, another protective layer is then added to fill the gaps in the blown fuses.

Inventors

  • 👤 Hirohiko Mochizuki
  • 👤 Masao Nakano
  • 👤 Fumio Baba
  • 👤 Tomio Nakano
  • 👤 Yoshihiro Takemae

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 15:06
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W42/00; H10W42/80

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 133 words
A semiconductor device having a fuse comprising: a semiconductor substrate; an isolating layer formed on said semiconductor substrate; fuse material formed on said isolating layer in a predetermined pattern; an insulating layer formed over said fuse material and over said isolating layer and shaped so as to provide windows over end portions of said fuse material; conductor material deposited in a predetermined shape over said insulating layer and through said windows to contact said fusing material; and a protective layer formed over said conductor material and said insulating layer, and shaped so as to provide a window to the middle portion of said fuse material, an additional protective layer covering at least said window to the middle portion of said fuse material, and formed after said fuse material has a gap formed therein.
Claim 2
Dependent Claim 133 words
A semiconductor device having a fuse comprising: a semiconductor substrate; an isolating layer formed on said semiconductor substrate; fuse material formed on said isolating layer in a predetermined pattern; an insulating layer formed over said fuse material and over said isolating layer and shaped so as to provide windows over end portions of said fuse material; conductor material deposited in a predetermined shape over said insulating layer and through said windows to contact said fusing material; and a protective layer formed over said conductor material and said insulating layer, and shaped so as to provide a window to the middle portion of said fuse material, an additional protective layer covering at least said window to the middle portion of said fuse material, and formed after said fuse material has a gap formed therein.
Claim 3
Dependent Claim 32 words
The semiconductor device of claim 1, wherein the gap is formed in the middle portion of said fuse material and said additional protective layer is formed so as to fill the gap.
Claim 4
Dependent Claim 30 words
The semiconductor device of claim 2, wherein said additional protective layer is formed so as to cover said conducting material, said fuse material, said insulating layer, and said protective layer.
Claim 5
Dependent Claim 29 words
The semiconductor device of claim 1, wherein said fuse material is formed into a bowtie shape of two relatively large end portions and a relatively narrow belt-shaped connecting portion.
Claim 6
Dependent Claim 15 words
The semiconductor device of claim 1, wherein said protective layer is made of phosphosilicate glass.
Claim 7
Dependent Claim 27 words
The semiconductor device of claim 2, wherein said additional protective layer is made of material selected from the group consisting of silicon nitride, phosphosilicate glass and polyimide.
Claim 8
Dependent Claim 50 words
The semiconductor device of claim 1, wherein the fuse material has a gap formed therein by imparting a fuse current to said fuse material and wherein the peak value of fusing current used to create the gap in said fuse material is in the range of 50 to 60 milliamperes.
Claim 9
Dependent Claim 15 words
A semiconductor device according to claim 1, wherein said device is a semiconductor memory device.
Claim 10
Dependent Claim 34 words
A semiconductor device according to claim 1, wherein the semiconductor device has a plurality of fuses each having a bow-tie shape of two relatively large end portions and a relatively narrow belt-shaped connecting portion.
Claim 11
Dependent Claim 28 words
A semiconductor device according to claim 1, wherein said protective layer is made of material selected from the group consisting of silicon dioxide, silicon nitride and phosphosilicate glass.
Claim 12
Dependent Claim 28 words
A semiconductor device according to claim 1, wherein said additional protective layer is made of material selected from the group consisting of silicon nitride, phosphosilicate glass and polyimide.
Claim 13
Dependent Claim 150 words
A semiconductor memory device having a plurality of bits and fuse elements for said bits, comprising: (a) a semiconductor substrate; (b) an isolating layer formed on said semiconductor substrate; (c) fuse material formed on said isolating layer in a predetermined shape; (d) an insulating layer formed over said fusing material and over said isolating layer and shaped so as to provide windows over the ends of said fuse material; (e) conductor material deposited in a predetermined shape over said insulating layer and through said windows to contact said fusing material; (f) a protective layer formed over said conductor material and over said insulating layer, and shaped so as to provide a window to the middle portion of said fuse material; and (g) an additional protective layer covering at least said window to the middle portion of said fuse material, and formed after said fuse material has a gap formed therein.
Claim 14
Dependent Claim 150 words
A semiconductor memory device having a plurality of bits and fuse elements for said bits, comprising: (a) a semiconductor substrate; (b) an isolating layer formed on said semiconductor substrate; (c) fuse material formed on said isolating layer in a predetermined shape; (d) an insulating layer formed over said fusing material and over said isolating layer and shaped so as to provide windows over the ends of said fuse material; (e) conductor material deposited in a predetermined shape over said insulating layer and through said windows to contact said fusing material; (f) a protective layer formed over said conductor material and over said insulating layer, and shaped so as to provide a window to the middle portion of said fuse material; and (g) an additional protective layer covering at least said window to the middle portion of said fuse material, and formed after said fuse material has a gap formed therein.
Claim 15
Dependent Claim 30 words
The device of claim 12, wherein the gap is formed in the middle portion of said fuse material and said additional protective layer formed so as to fill the gap.
Claim 16
Dependent Claim 24 words
The device of claim 13, wherein said additional protective layer covers said conducting material, said fuse material, said insulating layer and said protective layer.
Claim 17
Dependent Claim 28 words
The device of claim 12, wherein said fusing material is formed in a bowtie shape of two relatively large end portions and a relatively narrow belt-shaped connecting portion.
Claim 18
Dependent Claim 26 words
The device of claim 12, wherein said protective layer is made of material selected from the group consisting of silicon dioxide, silicon nitride and phosphosilicate glass.
Claim 19
Dependent Claim 26 words
The device of claim 13, wherein said additional protective layer is made of material selected from the group consisting of silicon nitride, phosphosilicate glass and polyimide.
Claim 20
Dependent Claim 51 words
The device of claim 12, wherein the fuse material has a gap formed therein by imparting a fuse current to said fuse material and wherein the peak value of the fusing current used to create said gap in said fuse material is in the range of from 50 to 60 milliamperes.

References Cited (Backward Citations)

US3564354A Cited
US3792319A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-10-31 1987-05-02 1987-11-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-10-31 1991-05-02 1991-11-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-10-31 1995-05-02 1995-11-01 $7700.00 Window Closed / Lapsed

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