US5282158A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor antifuse for a programmable ROM
Assignee: Round Rock Research LLC
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Filing: 1992-08-21
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Granted: 1994-01-25
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Expires: 2012-08-21
Abstract
Abstract A programmable read-only memory device and method of fabrication are disclosed having an antifuse in the drain node of a field effect transistor. Programming is accomplished by imposing a high voltage on the transistor drain and gate which causes the antifuse to be a closed circuit; otherwise, the transistor appears as an open circuit. Locating the antifuse in the drain node as opposed to the source node avoids problems of source reverse bias.
Inventors
- 👤 Roger R. Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 13:30
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; H10B; H10B20/00
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
159 words
A programmable read-only memory (PROM) chip having pairs of MOSFET devices comprising: (a) a gate oxide formed over substrate; (b) a pair of gates formed over the gate oxide; (c) a drain diffusion formed between the gates; (d) a pair of source diffusions formed on an outside area of the gates; (e) a source line formed over the pair of source diffusions; (f) a trench formed between the pair of gates separating the drain diffusion into a first and second drain diffusion; (g) an insulating oxide grown within the trench; (h) an antifuse material deposited over the pair of MOSFET devices and having electrical contact with the first and second diffusions; and (i) a bit line deposited over the trench and drain diffusions, wherein applying a voltage on the bit line and source line shorts the antifuse material thereby creating a functional MOSFET, and not applying a voltage on the bit line and source line provides an open circuit.
Claim 2
Dependent Claim
159 words
A programmable read-only memory (PROM) chip having pairs of MOSFET devices comprising: (a) a gate oxide formed over substrate; (b) a pair of gates formed over the gate oxide; (c) a drain diffusion formed between the gates; (d) a pair of source diffusions formed on an outside area of the gates; (e) a source line formed over the pair of source diffusions; (f) a trench formed between the pair of gates separating the drain diffusion into a first and second drain diffusion; (g) an insulating oxide grown within the trench; (h) an antifuse material deposited over the pair of MOSFET devices and having electrical contact with the first and second diffusions; and (i) a bit line deposited over the trench and drain diffusions, wherein applying a voltage on the bit line and source line shorts the antifuse material thereby creating a functional MOSFET, and not applying a voltage on the bit line and source line provides an open circuit.
Claim 3
Dependent Claim
40 words
The PROM chip of claim 1 wherein the gates further comprise: (a) a doped polysilicon layer over the gate oxide; (b) a tungsten silicide layer over the doped polysilicon layer; and (c) an oxide layer over the tungsten silicide layer.
Claim 4
Dependent Claim
22 words
The PROM chip of claim 2 wherein the antifuse material is selected from the group consisting of silicon oxide and silicon nitride.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-01-24 | 1997-07-26 | 1998-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-01-24 | 2001-07-26 | 2002-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-01-24 | 2005-07-26 | 2006-01-25 | $7700.00 | Window Closed / Lapsed |