Method for making semiconductor device with integral fuse

Claim 1

A method of forming a semiconductor device comprising the steps of: (a) forming a plurality of spaced apart first conductivity type regions in the surface of a substrate, each of said regions being dielectrically isolated from said substrate; (b) forming a base of second conductivity type within at least one of said plurality of regions; (c) forming a layer of silicon oxide on the surface of said at least one region; (d) forming a layer of silicon nitride on said layer of silicon oxide; (e) forming a layer of polycrystalline silicon on said layer of nitride; (f) removing a portion of said layers of nitride and polysilicon to define a fuse element of the remaining portion of said layers; (g) forming an emitter of first conductivity type within said base formed in step b; (h) forming a layer of silicon oxide upon said emitter; (i) forming a plurality of openings in said layer of silicon oxide; thereby exposing portions of said regions; (j) forming a layer of platinum upon said layer of silicon oxide, said exposed portions of said regions, and said fuse element; (k) heating said semiconductor and alloying said platinum and said remaining portion of polysilicon of said fuse element and said portions of said regions to form platinum silicide; (l) removing residual platinum from said semiconductor leaving said platinum silicide fuse element and said platinum silicide portions of said regions; (m) forming a plurality of electrical contacts, one at each of two extremities of said fuse element and one at each of said portions of said regions; (n) interconnecting said electrical contacts to form an integrated circuit.

Claim 2

A method of forming a semiconductor device comprising the steps of: (a) forming a plurality of spaced apart first conductivity type regions in the surface of a substrate, each of said regions being dielectrically isolated from said substrate; (b) forming a base of second conductivity type within at least one of said plurality of regions; (c) forming a layer of silicon oxide on the surface of said at least one region; (d) forming a layer of silicon nitride on said layer of silicon oxide; (e) forming a layer of polycrystalline silicon on said layer of nitride; (f) removing a portion of said layers of nitride and polysilicon to define a fuse element of the remaining portion of said layers; (g) forming an emitter of first conductivity type within said base formed in step b; (h) forming a layer of silicon oxide upon said emitter; (i) forming a plurality of openings in said layer of silicon oxide; thereby exposing portions of said regions; (j) forming a layer of platinum upon said layer of silicon oxide, said exposed portions of said regions, and said fuse element; (k) heating said semiconductor and alloying said platinum and said remaining portion of polysilicon of said fuse element and said portions of said regions to form platinum silicide; (l) removing residual platinum from said semiconductor leaving said platinum silicide fuse element and said platinum silicide portions of said regions; (m) forming a plurality of electrical contacts, one at each of two extremities of said fuse element and one at each of said portions of said regions; (n) interconnecting said electrical contacts to form an integrated circuit.