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US3852802A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit hall effect device and method

Assignee: Signetics Corp
•
Filing: 1973-10-10
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Granted: 1974-12-03
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Expires: 1993-10-10
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Abstract

Abstract An integrated circuit including a Hall effect semiconductor device and a method for making the device. A semiconductor body is carried by a support structure and insulating material forms a plurality of isolated islands in the semiconductor body. In accordance with one embodiment some isolated islands of the semiconductor body have a relatively thick epitaxial layer thereon with transistors or other circuit elements formed therein according to conventional techniques. At least one of the isolated islands has a relatively thin epitaxial layer thereon with a diffused region of conductivity type opposite that of the epitaxial layer formed in the epitaxial layer. The relatively thin epitaxial layer has means forming a pair of current terminals at opposite ends of one lateral dimension thereof and means forming a pair of Hall voltage terminals at opposite ends of the other lateral dimension thereof.

Inventors

  • 👤 H Wolf
  • 👤 D Kleitman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 14:14
CPC Classifications
H; H10; H10B; H10B61/00; H10N; H10N59/00; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/05; Y10S148/051; Y10S148/085; Y10S148/102; Y10S148/145

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 100 words
An integrated circuit comprising: a single crystal semiconductor body of one conductivity type, a layer of semiconductive material of the opposite conductivity type carried on one face of said semiconductor body said layer having a planar outer surface and a stepped inner boundary contiguous to said semiconductor body to provide both a relatively thick layer and a relatively thin layer; means for electrically isolating at least a portion of said thin layer from at least a portion of said thick layer; a Hall effect device formed in said thin layer portion; and a transistor formed in said thick layer portion.
Claim 2
Dependent Claim 100 words
An integrated circuit comprising: a single crystal semiconductor body of one conductivity type, a layer of semiconductive material of the opposite conductivity type carried on one face of said semiconductor body said layer having a planar outer surface and a stepped inner boundary contiguous to said semiconductor body to provide both a relatively thick layer and a relatively thin layer; means for electrically isolating at least a portion of said thin layer from at least a portion of said thick layer; a Hall effect device formed in said thin layer portion; and a transistor formed in said thick layer portion.
Claim 3
Dependent Claim 20 words
A circuit as in claim 1 where said thin layer is 2 microns and said thick layer is 12 microns.
Claim 4
Dependent Claim 29 words
A circuit as in claim 1 where said Hall effect device includes a region inset into said thin layer portion of opposite conductivity type to said thin layer portion.
Claim 5
Dependent Claim 40 words
A circuit as in claim 3 where said transistor includes a first region inset into said thick layer portion of opposite conductivity type to such portion and a second region inset into said first region of the same conductivity type.
Claim 6
Dependent Claim 16 words
A circuit as in claim 1 where said layer carried on said semiconductor body is epitaxial.

References Cited (Backward Citations)

US3305790A Cited
US3404321A Cited
US3522494A Cited
US3596114A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-12-02 1978-06-03 1978-12-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-12-02 1982-06-03 1982-12-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-12-02 1986-06-03 1986-12-03 $7700.00 Window Closed / Lapsed

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