Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
127 words
A variable resistance material-based memory cell comprising: a first node and a second node; a memory element having a first electrode and a second electrode, and having a resettable variable resistance material layer disposed between the first and second electrodes, said first electrode being electrically coupled to said first node; and a MOS diode having a gate, a source, a drain, and a channel defined between said source and said drain, said channel being about 0.2 microns long or less, said source being electrically coupled to said second electrode of said memory element, and said gate and said drain being electrically coupled to said second node, said diode being configured to promote operation in a snapback region during application of a programming current to said memory cell.
Claim 2
Dependent Claim
127 words
A variable resistance material-based memory cell comprising: a first node and a second node; a memory element having a first electrode and a second electrode, and having a resettable variable resistance material layer disposed between the first and second electrodes, said first electrode being electrically coupled to said first node; and a MOS diode having a gate, a source, a drain, and a channel defined between said source and said drain, said channel being about 0.2 microns long or less, said source being electrically coupled to said second electrode of said memory element, and said gate and said drain being electrically coupled to said second node, said diode being configured to promote operation in a snapback region during application of a programming current to said memory cell.
Claim 3
Dependent Claim
126 words
A variable resistance material-based memory matrix for storing data comprising: a plurality of first address lines and a plurality of second address lines; and a plurality of memory cells, each said memory cell being electrically coupled between one of said first address lines and one of said second address lines, each said memory cell comprising a resettable variable resistance material memory element connected in series with a MOS diode, said MOS diode comprising a gate, a source, a drain, and a channel defined between said source and said drain, said MOS diode being configured to promote operation in a snapback region during application of voltage to said memory cell during operation, wherein said channel region of each said MOS diode is about 0.2 microns or less.
Claim 4
Dependent Claim
126 words
A variable resistance material-based memory matrix for storing data comprising: a plurality of first address lines and a plurality of second address lines; and a plurality of memory cells, each said memory cell being electrically coupled between one of said first address lines and one of said second address lines, each said memory cell comprising a resettable variable resistance material memory element connected in series with a MOS diode, said MOS diode comprising a gate, a source, a drain, and a channel defined between said source and said drain, said MOS diode being configured to promote operation in a snapback region during application of voltage to said memory cell during operation, wherein said channel region of each said MOS diode is about 0.2 microns or less.
Claim 5
Dependent Claim
29 words
A memory cell comprising: a reprogrammable memory element; and a diode-connected transistor coupled to said memory element, said transistor having a channel length of no more than 0.2 microns.
Claim 6
Dependent Claim
29 words
A memory cell comprising: a reprogrammable memory element; and a diode-connected transistor coupled to said memory element, said transistor having a channel length of no more than 0.2 microns.
Claim 7
Dependent Claim
41 words
A memory cell comprising: a reprogrammable memory element; and a diode-connected transistor coupled to said memory element, said transistor operating in a snapback region during reprogramming of said memory element, and said transistor having a channel length less than 0.2 microns.
Claim 8
Dependent Claim
41 words
A memory cell comprising: a reprogrammable memory element; and a diode-connected transistor coupled to said memory element, said transistor operating in a snapback region during reprogramming of said memory element, and said transistor having a channel length less than 0.2 microns.