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Method for fabricating a rectifying P-N junction having improved breakdown voltage characteristics

Assignee: Arris Technology Inc
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Filing: 1985-10-04
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Granted: 1988-04-26
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Expires: 2005-10-04
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Abstract

Abstract A rectifier is fabricated from a P-N junction having a P-type semiconductor layer and an adjacent N-type semiconductor layer. A mesa structure is formed in at least one of said layers. Impurities are deposited at the top of the mesa to form a high concentration region in the surface thereof. The impurities are diffused from the top surface of the mesa toward the P-N junction, whereby the mesa geometry causes the diffusion to take on a generally concave shape as it penetrates into the mesa. The distance between the perimeter of the high concentration region and the wafer substrate is therefore greater than the distance between the central portion of said region and the wafer substrate, providing improved breakdown voltage characteristics and a lower surface field. Breakdown voltage can be measured during device fabrication and precisely controlled by additional diffusions to drive the high concentration region to the required depth.

Inventors

  • 👤 Willem G. Einthoven
  • 👤 Muni M. Mitchell

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 16:59
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/103; H10D62/104; H10D62/60; H10D8/00; H10D8/01; H10D8/045; H10D8/422; Y; Y10; Y10S; Y10S438/00; Y10S438/965; Y10S438/978

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 181 words
A method for fabricating a rectifying semiconductor junction having improved breakdown voltage characteristics comprising the steps of: providing a semiconductor junction having a semiconductor layer of a first polarity and an adjacent lightly doped semiconductor layer of a second polarity in a semiconductor wafer having <100> crystal orientation; forming a mesa in said lightly doped layer having walls defined by said <100> crystal orientation that slope outwardly from a top surface thereof toward said junction; forming a high concentration region extending entirely across the top surface of the mesa, said high concentration region being of the same semiconductor conductivity type as the lightly doped layer; and diffusing the high concentration region deeper into the mesa toward said junction but not below the base of the mesa, relying on the outward slope of the mesa geometry to cause the diffusion to take on a generally concave shape as it penetrates into the mesa, with the distance between the diffused high concentration region and the junction being greater adjacent the sloping walls of the mesa than in the central core of the mesa.
Claim 2
Independent Claim 181 words
A method for fabricating a rectifying semiconductor junction having improved breakdown voltage characteristics comprising the steps of: providing a semiconductor junction having a semiconductor layer of a first polarity and an adjacent lightly doped semiconductor layer of a second polarity in a semiconductor wafer having <100> crystal orientation; forming a mesa in said lightly doped layer having walls defined by said <100> crystal orientation that slope outwardly from a top surface thereof toward said junction; forming a high concentration region extending entirely across the top surface of the mesa, said high concentration region being of the same semiconductor conductivity type as the lightly doped layer; and diffusing the high concentration region deeper into the mesa toward said junction but not below the base of the mesa, relying on the outward slope of the mesa geometry to cause the diffusion to take on a generally concave shape as it penetrates into the mesa, with the distance between the diffused high concentration region and the junction being greater adjacent the sloping walls of the mesa than in the central core of the mesa.
Claim 3
Dependent Claim 45 words
The method of claim 1 comprising the further steps of: measuring the breakdown voltage of the P-N junction after said diffusion step; and diffusing the high concentration region deeper into said mesa to achieve a lower breakdown voltage if the measured voltage is too high.
Claim 4
Dependent Claim 23 words
The method of claim 2 comprising the further step of: repeating said measuring and diffusing steps until a desired breakdown voltage is achieved.
Claim 5
Dependent Claim 15 words
The method of claim 1 wherein said P-N junction is formed in an epitaxial wafer.
Claim 6
Dependent Claim 12 words
The method of claim 1 wherein said mesa has a frustum shape.
Claim 7
Dependent Claim 20 words
The method of claim 1 wherein said mesa is anisotropically etched in a semiconductor material having a <100> crystal orientation.
Claim 8
Dependent Claim 21 words
The method of claim 1 comprising the further step of applying a passivation layer to the side wall of said mesa.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-04-26 1991-10-26 1992-04-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-04-26 1995-10-26 1996-04-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-04-26 1999-10-26 2000-04-26 $7700.00 Window Closed / Lapsed

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