Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
195 words
A process of forming semiconductive units comprising forming in a semiconductive wafer over a first major surface a plurality of regularly spaced bands of a first conductivity type interleaved with bands of an opposite conductivity type, forming in the semiconductive wafer over a second, opposed major surface a plurality of regularly spaced bands of the first conductivity type interleaved with bands of the opposite conductivity type, the bands of the first conductivity type at the first major surface being aligned with bands of the opposite conductivity type at the second major surface, whereby a rectifying junction is formed by the bands within the wafer between each pair of opposed bands, forming grooves in the first major surface to a depth sufficient to intersect the rectifying junctions, the grooves being located at the intersection of adjacent bands, forming grooves in the second major surface to a depth sufficient to intersect the rectifying junctions, the grooves being arranged in laterally spaced rows and separating at least a portion of the bands on the second major surface into a plurality of laterally spaced segments, and sub-dividing the wafer along the grooves to form semiconductive units from the wafer.
Claim 2
Dependent Claim
195 words
A process of forming semiconductive units comprising forming in a semiconductive wafer over a first major surface a plurality of regularly spaced bands of a first conductivity type interleaved with bands of an opposite conductivity type, forming in the semiconductive wafer over a second, opposed major surface a plurality of regularly spaced bands of the first conductivity type interleaved with bands of the opposite conductivity type, the bands of the first conductivity type at the first major surface being aligned with bands of the opposite conductivity type at the second major surface, whereby a rectifying junction is formed by the bands within the wafer between each pair of opposed bands, forming grooves in the first major surface to a depth sufficient to intersect the rectifying junctions, the grooves being located at the intersection of adjacent bands, forming grooves in the second major surface to a depth sufficient to intersect the rectifying junctions, the grooves being arranged in laterally spaced rows and separating at least a portion of the bands on the second major surface into a plurality of laterally spaced segments, and sub-dividing the wafer along the grooves to form semiconductive units from the wafer.
Claim 3
Dependent Claim
63 words
A process according to claim 1 in which the bands of the first conductivity type are simultaneously formed adjacent the first and second surfaces by masking the wafer along regularly spaced bands over the first and second surfaces with the bands on the opposed surfaces being misaligned and thereafter diffusing an impurity of the first conductivity type into the wafer portions not masked.
Claim 4
Dependent Claim
24 words
A process according to claim 1 in which contact metallization is applied to the first and second major surfaces prior to forming the grooves.
Claim 5
Dependent Claim
35 words
A process according to claim 1 in which contact metallization is applied to at least one of the major surfaces in laterally spaced bands and the metallization bands are used as masks in forming grooves.
Claim 6
Dependent Claim
42 words
A process according to claim 1 in which the wafer is sub-divided so that at least one of the semiconductive sub-units is bounded by surface portions of initially non-adjacent grooves along opposite edges and includes an undisturbed groove segment within its periphery.
Claim 7
Dependent Claim
50 words
A process according to claim 1 in which the wafer is sub-divided so that at least one of the semiconductive sub-units is bounded on all opposite edges by surface portions of initially non-adjacent grooves and includes undisturbed groove segments within its periphery adjacent both its first and second major surfaces.
Claim 8
Dependent Claim
21 words
A process according to claim 1 in which a protective passivant is applied to the grooves prior to subdividing the wafer.
Claim 9
Dependent Claim
37 words
A process according to claim 1 in which portions of the sub-units adjacent the fIrst and second major surfaces are provided with contacts and the remaining surfaces of the sub-units are protectively encapsulated by a dielectric passivant.