Patent US6633988B2 successfully refreshed from Google Patents.
US6633988B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Processor having real-time power conservation
Assignee: Texas Instruments Inc
•
Filing: 2002-02-11
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Granted: 2003-10-14
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Expires: 2022-02-11
Abstract
Abstract A processor, comprising a monitor for measuring the relative amount of Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor. Another embodiment discloses a processor, comprising a monitor for measuring the relative importance of Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of said processor. Still another embodiment discloses a processor, comprising a monitor for measuring the relative amount of time between Input/Output (I/O) within the processor, results of the measuring being used by the processor for controlling a clock speed of the processor.
Inventors
- 👤 LaVaughn F. Watts, Jr.
- 👤 Steven J. Wallace
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 23:15
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/02; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3234; G06F1/324; G06F1/16; G06F1/20; G06F1/206; Y; Y02; Y02D; Y02D10/00
Claims Analysis
Total Claims: 57
Claim 1
Independent Claim
33 words
A processor, comprising: a monitor for measuring the relative amount of Input/Output (I/O) within said processor, results of said measuring being used by said processor for controlling a clock speed of said processor.
Claim 2
Dependent Claim
33 words
A processor, comprising: a monitor for measuring the relative amount of Input/Output (I/O) within said processor, results of said measuring being used by said processor for controlling a clock speed of said processor.
Claim 3
Dependent Claim
27 words
The processor of claim 1 , wherein said controlling a clock speed of said processor is responsive to usage of said processor being below a preselected level.
Claim 4
Dependent Claim
20 words
The processor of claim 1 , wherein said clock speed of said processor is controlled to reduce processor idle time.
Claim 5
Dependent Claim
24 words
The processor of claim 1 , wherein said clock speed of said processor is controlled to minimize the relative amount of processor idle time.
Claim 6
Dependent Claim
29 words
The processor of claim 1 , wherein said clock speed of said processor is modified in response to a utilization percentage of said processor being below a preselected level.
Claim 7
Dependent Claim
23 words
The processor of claim 1 , wherein said clock speed of said processor is modified to control a utilization percentage of said processor.
Claim 8
Dependent Claim
36 words
The processor of claim 1 , wherein said results of said measuring are used by said processor for providing a signal for circuitry for controlling periods of time a processor clock is in an OFF state.
Claim 9
Dependent Claim
34 words
The processor of claim 7 , wherein energy consumption in said processor is at a maximum when the length of each period of time said clock is in an OFF state is at zero.
Claim 10
Dependent Claim
29 words
The processor of claim 7 , wherein energy consumption in said processor decreases as the length of each period of time said clock is in an OFF state increases.
Claim 11
Dependent Claim
30 words
The processor of claim 7 , wherein said periods of time said clock is in an OFF state are constantly being adjusted to optimize said utilization percentage of said processor.
Claim 12
Dependent Claim
21 words
The processor of claim 7 , wherein said OFF state represents the minimum clock rate at which said processor can operate.
Claim 13
Dependent Claim
22 words
The processor of claim 11 , wherein said minimum clock rate may be zero for processors that can have their clocks stopped.
Claim 14
Dependent Claim
22 words
The processor of claim 1 , wherein said monitor inhibits modification of said clock speed while said processor is processing critical I/O.
Claim 15
Dependent Claim
25 words
The processor of claim 1 , wherein said processor releases control of said clock speed in response to said monitor detecting a critical I/O request.
Claim 16
Dependent Claim
11 words
The processor of claim 1 , wherein said monitor is self-tuning.
Claim 17
Dependent Claim
17 words
The processor of claim 15 , wherein said monitor uses a control system of continuous feedback loops.
Claim 18
Dependent Claim
15 words
The processor of claim 1 , wherein said processor is a central processing unit (CPU).
Claim 19
Dependent Claim
16 words
The processor of claim 1 , wherein said monitor is a program installed on said processor.
Claim 20
Dependent Claim
33 words
A processor, comprising: a monitor for measuring the relative importance of Input/Output (I/O) within said processor, results of said measuring being used by said processor for controlling a clock speed of said processor.
Claim 21
Dependent Claim
33 words
A processor, comprising: a monitor for measuring the relative importance of Input/Output (I/O) within said processor, results of said measuring being used by said processor for controlling a clock speed of said processor.
Claim 22
Dependent Claim
27 words
The processor of claim 19 , wherein said controlling a clock speed of said processor is responsive to usage of said processor being below a preselected level.
Claim 23
Dependent Claim
20 words
The processor of claim 19 , wherein said clock speed of said processor is controlled to reduce processor idle time.
Claim 24
Dependent Claim
24 words
The processor of claim 19 , wherein said clock speed of said processor is controlled to minimize the relative amount of processor idle time.
Claim 25
Dependent Claim
29 words
The processor of claim 19 , wherein said clock speed of said processor is modified in response to a utilization percentage of said processor being below a preselected level.
Claim 26
Dependent Claim
23 words
The processor of claim 19 , wherein said clock speed of said processor is modified to control a utilization percentage of said processor.
Claim 27
Dependent Claim
36 words
The processor of claim 19 , wherein said results of said measuring are used by said processor for providing a signal for circuitry for controlling periods of time a processor clock is in an OFF state.
Claim 28
Dependent Claim
34 words
The processor of claim 25 , wherein energy consumption in said processor is at a maximum when the length of each period of time said clock is in an OFF state is at zero.
Claim 29
Dependent Claim
29 words
The processor of claim 25 , wherein energy consumption in said processor decreases as the length of each period of time said clock is in an OFF state increases.
Claim 30
Dependent Claim
30 words
The processor of claim 25 , wherein said periods of time said clock is in an OFF state are constantly being adjusted to optimize said utilization percentage of said processor.
Claim 31
Dependent Claim
21 words
The processor of claim 25 , wherein said OFF state represents the minimum clock rate at which said processor can operate.
Claim 32
Dependent Claim
22 words
The processor of claim 29 , wherein said minimum clock rate may be zero for processors that can have their clocks stopped.
Claim 33
Dependent Claim
22 words
The processor of claim 19 , wherein said monitor inhibits modification of said clock speed while said processor is processing critical I/O.
Claim 34
Dependent Claim
25 words
The processor of claim 19 , wherein said processor releases control of said clock speed in response to said monitor detecting a critical I/O request.
Claim 35
Dependent Claim
11 words
The processor of claim 19 , wherein said monitor is self-tuning.
Claim 36
Dependent Claim
17 words
The processor of claim 33 , wherein said monitor uses a control system of continuous feedback loops.
Claim 37
Dependent Claim
15 words
The processor of claim 19 , wherein said processor is a central processing unit (CPU).
Claim 38
Dependent Claim
16 words
The processor of claim 19 , wherein said monitor is a program installed on said processor.
Claim 39
Dependent Claim
35 words
A processor, comprising: a monitor for measuring the relative amount of time between Input/Output (I/O) within said processor, results of said measuring being used by said processor for controlling a clock speed of said processor.
Claim 40
Dependent Claim
35 words
A processor, comprising: a monitor for measuring the relative amount of time between Input/Output (I/O) within said processor, results of said measuring being used by said processor for controlling a clock speed of said processor.
Claim 41
Dependent Claim
27 words
The processor of claim 37 , wherein said controlling a clock speed of said processor is responsive to usage of said processor being below a preselected level.
Claim 42
Dependent Claim
20 words
The processor of claim 37 , wherein said clock speed of said processor is controlled to reduce processor idle time.
Claim 43
Dependent Claim
24 words
The processor of claim 37 , wherein said clock speed of said processor is controlled to minimize the relative amount of processor idle time.
Claim 44
Dependent Claim
29 words
The processor of claim 37 , wherein said clock speed of said processor is modified in response to a utilization percentage of said processor being below a preselected level.
Claim 45
Dependent Claim
23 words
The processor of claim 37 , wherein said clock speed of said processor is modified to control a utilization percentage of said processor.
Claim 46
Dependent Claim
36 words
The processor of claim 37 , wherein said results of said measuring are used by said processor for providing a signal for circuitry for controlling periods of time a processor clock is in an OFF state.
Claim 47
Dependent Claim
34 words
The processor of claim 43 , wherein energy consumption in said processor is at a maximum when the length of each period of time said clock is in an OFF state is at zero.
Claim 48
Dependent Claim
29 words
The processor of claim 43 , wherein energy consumption in said processor decreases as the length of each period of time said clock is in an OFF state increases.
Claim 49
Dependent Claim
30 words
The processor of claim 43 , wherein said periods of time said clock is in an OFF state are constantly being adjusted to optimize said utilization percentage of said processor.
Claim 50
Dependent Claim
21 words
The processor of claim 43 , wherein said OFF state represents the minimum clock rate at which said processor can operate.
Claim 51
Dependent Claim
22 words
The processor of claim 47 , wherein said minimum clock rate may be zero for processors that can have their clocks stopped.
Claim 52
Dependent Claim
22 words
The processor of 37 , claim wherein said monitor inhibits modification of said clock speed while said processor is processing critical I/O.
Claim 53
Dependent Claim
25 words
The processor of claim 37 , wherein said processor releases control of said clock speed in response to said monitor detecting a critical I/O request.
Claim 54
Dependent Claim
11 words
The processor of claim 37 , wherein said monitor is self-tuning.
Claim 55
Dependent Claim
17 words
The processor of claim 51 , wherein said monitor uses a control system of continuous feedback loops.
Claim 56
Dependent Claim
15 words
The processor of claim 37 , wherein said processor is a central processing unit (CPU).
Claim 57
Dependent Claim
16 words
The processor of claim 37 , wherein said monitor is a program installed on said processor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-10-13 | 2007-04-14 | 2007-10-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-10-13 | 2011-04-14 | 2011-10-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-10-13 | 2015-04-14 | 2015-10-14 | $7700.00 | Window Closed / Lapsed |