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Semiconductor device having a multi-layer pad and manufacturing method thereof

Assignee: Renesas Electronics Corp
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Filing: 2001-10-15
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Granted: 2003-07-22
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Expires: 2021-10-15
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Abstract

Abstract In the semiconductor device manufactured by the manufacturing method of the present invention, the tungsten layer resistant to an impulsive force is formed without the oxide film layer existing below the second pad. Hence, if an external force is applied to the second pad through an opening upon bonding or the like, cracks are hard to occur. Accordingly, it is possible to provide a semiconductor device high in mechanical strength and reliability and a method of manufacturing.

Inventors

  • 👤 Masakazu Okada

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 19:06
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/01; H10W72/019; H10W72/012; H10W72/20; H10W72/251; H10W72/29; H10W72/90; H10W72/921; H10W72/923; H10W72/9232; H10W72/931; H10W72/934; H10W72/951; H10W72/952; H10W72/981; H10W72/983

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 175 words
A method of manufacturing a semiconductor device, the method comprising the steps of: forming a first pad over a base substrate; forming an insulating film layer over the first pad; defining a concave pad opening in the insulating film layer so as to expose substantially all of the surface of the first pad; forming a first barrier metal layer over the first pad and the insulating film layer so as to extend along the concave shape of the pad opening; forming a plug layer over the first barrier metal layer; performing chemical mechanical polishing on the plug layer and the first barrier metal layer to thereby expose the insulating film layer retaining at least a portion of the plug layer in the pad opening; forming a second barrier metal layer over the plug layer and insulating film layer exposed by said chemical mechanical polishing step; and forming a second pad over the second barrier metal layer, wherein said second pad is a bonding pad having an exposed portion of sufficient area to permit wire bonding.
Claim 2
Independent Claim 175 words
A method of manufacturing a semiconductor device, the method comprising the steps of: forming a first pad over a base substrate; forming an insulating film layer over the first pad; defining a concave pad opening in the insulating film layer so as to expose substantially all of the surface of the first pad; forming a first barrier metal layer over the first pad and the insulating film layer so as to extend along the concave shape of the pad opening; forming a plug layer over the first barrier metal layer; performing chemical mechanical polishing on the plug layer and the first barrier metal layer to thereby expose the insulating film layer retaining at least a portion of the plug layer in the pad opening; forming a second barrier metal layer over the plug layer and insulating film layer exposed by said chemical mechanical polishing step; and forming a second pad over the second barrier metal layer, wherein said second pad is a bonding pad having an exposed portion of sufficient area to permit wire bonding.
Claim 3
Dependent Claim 29 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said pad opening is a single opening having no insulating film layer within a region thereof.
Claim 4
Independent Claim 209 words
A method of manufacturing a semiconductor device, the method comprising the steps of: forming a first pad over a base substrate; forming a stopper layer over the first pad; forming an insulating film layer over the first pad and stopper layer; defining a concave pad opening in the insulating film layer so as to expose substantially all of the stopper layer on the surface of the first pad; forming a first barrier metal layer over the stopper layer and the insulating film layer so as to extend along the concave shape of the pad opening; forming a plug layer over the first barrier metal layer; performing chemical mechanical polishing on the plug layer and the first barrier metal layer to thereby expose the insulating film layer retaining at least a portion of the plug layer in the pad opening, said portion of the plug layer defining a concave upper surface; forming a second barrier metal layer over the plug layer and insulating film layer exposed by said chemical mechanical polishing step; and forming a second pad over the second barrier metal layer, wherein the concavity of said concave upper surface of said plug layer is at least substantially imparted to said second barrier metal layer and said second pad.
Claim 5
Independent Claim 209 words
A method of manufacturing a semiconductor device, the method comprising the steps of: forming a first pad over a base substrate; forming a stopper layer over the first pad; forming an insulating film layer over the first pad and stopper layer; defining a concave pad opening in the insulating film layer so as to expose substantially all of the stopper layer on the surface of the first pad; forming a first barrier metal layer over the stopper layer and the insulating film layer so as to extend along the concave shape of the pad opening; forming a plug layer over the first barrier metal layer; performing chemical mechanical polishing on the plug layer and the first barrier metal layer to thereby expose the insulating film layer retaining at least a portion of the plug layer in the pad opening, said portion of the plug layer defining a concave upper surface; forming a second barrier metal layer over the plug layer and insulating film layer exposed by said chemical mechanical polishing step; and forming a second pad over the second barrier metal layer, wherein the concavity of said concave upper surface of said plug layer is at least substantially imparted to said second barrier metal layer and said second pad.
Claim 6
Dependent Claim 22 words
The method of manufacturing a semiconductor device according to claim 3 , wherein said stopper layer is formed of TiN/Ti or TiO/Ti.
Claim 7
Dependent Claim 53 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said step for performing said CMP to thereby expose the insulating film layer and leave the plug layer in the pad opening is a step for leaving the plug layer within a region for the pad opening in concave form.
Claim 8
Dependent Claim 68 words
The method of manufacturing a semiconductor device according to claim 1 , further including, after said step for forming the plug layer over the first barrier metal layer, a step for forming a third barrier metal layer over the plug layer, and a step for CMP-polishing the third barrier metal layer to thereby expose the plug layer and leave the third barrier metal layer in the pad opening.
Claim 9
Dependent Claim 53 words
The method of manufacturing a semiconductor device according to claim 6 , wherein said step for forming the plug layer over the first barrier metal layer and thereafter forming the third barrier metal layer over the plug layer is repeated plural times to repeatedly laminate a barrier metal layer and a plug layer.
Claim 10
Dependent Claim 133 words
The method of manufacturing a semiconductor device according to claim 1 , further including, after said step for forming the plug layer over the first barrier metal layer, a step for forming a third barrier metal layer over the plug layer, a step for forming an anti-reflection film layer over the third barrier metal layer, a step for plasma-processing the anti-reflection film layer to thereby leave the anti-reflection film layer only in the pad opening, a step for etching the third barrier metal layer with the anti-reflection film layer left in the pad opening as a mask to thereby expose the plug layer and leave the anti-reflection film layer and the third barrier metal layer in the pad opening, and a step for removing the anti-reflection film layer left in the pad opening.
Claim 11
Dependent Claim 114 words
The method of manufacturing a semiconductor device according claim 1 , further including, after said step for forming the plug layer over the first barrier metal layer, a step for forming a plasma oxide film layer over the plug layer, and a step for effecting the oxide film CMP on the plasma oxide film layer to thereby expose the plug layer and leave the plasma oxide film layer in the pad opening, and further including a step for removing the plasma oxide film layer left in the pad opening by etching after said step for performing said CMP to thereby expose the insulating film layer and leave the plug layer in the pad opening.
Claim 12
Dependent Claim 56 words
The method of manufacturing a semiconductor device according to claim 9 , wherein said step for performing said oxide film CMP to thereby expose the plug layer and leave the plasma oxide film layer in the pad opening is a step for performing polishing while controlling polishing pressure through the use of an oxide film slurry.
Claim 13
Dependent Claim 20 words
The method of manufacturing a semiconductor device according to claim 1 , wherein the plug layer is formed of tungsten.
Claim 14
Dependent Claim 23 words
The method of manufacturing a semiconductor device according to claim 1 , wherein the first pad or second pad is formed of Al.
Claim 15
Dependent Claim 39 words
The method of manufacturing a semiconductor device according to claim 1 , wherein said step for forming the second pad over the first pad is repeated plural times to thereby laminate a plurality of pads over the first pad.
Claim 16
Dependent Claim 12 words
A semiconductor device manufactured by the method according to claim 1 .

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-07-21 2007-01-20 2007-07-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-07-21 2011-01-20 2011-07-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-07-21 2015-01-20 2015-07-22 $7700.00 Window Closed / Lapsed

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