Patent US6140167A successfully refreshed from Google Patents.
US6140167A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High performance MOSFET and method of forming the same using silicidation and junction implantation prior to gate formation
Assignee: GlobalFoundries Inc
•
Filing: 1998-08-18
•
Granted: 2000-10-31
•
Expires: 2018-08-18
Abstract
Abstract A method is presented for forming a transistor wherein a silicide layer is formed upon an impurity region of a semiconductor substrate. After forming the silicide layer, a gate structure is preferably formed upon an exposed portion of the semiconductor substrate; however, the silicide layer may be formed after forming the gate structure. In order to form the gate structure, a layer of sacrificial material is first formed above the semiconductor substrate. An opening is then patterned through the layer of sacrificial material such that a portion of the semiconductor substrate is exposed. The gate structure preferably includes a metal gate conductor and a metal oxide gate dielectric.
Inventors
- 👤 Mark I. Gardner
- 👤 Mark C. Gilmer
- 👤 Frederick N. Hause
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 04:15
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D64/685; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0225; H10D30/60; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01316; H10D64/01332; H10D64/0135; H10D64/025; H10D64/027; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/691; H10D64/01336; H10D64/01344; H10D64/01346; H10D64/665; H10D64/693
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
81 words
A method for forming a transistor, comprising: forming a silicide layer upon an impurity region of a semiconductor substrate; forming a layer of sacrificial material above the semiconductor substrate; patterning an opening through the layers of sacrificial material and silicide and into the semiconductor substrate such that an exposed portion of the semiconductor substrate is formed; and forming a metal gate conductor upon a metal oxide gate dielectric exclusively within the opening and upon the exposed portion of the semiconductor substrate.
Claim 2
Independent Claim
81 words
A method for forming a transistor, comprising: forming a silicide layer upon an impurity region of a semiconductor substrate; forming a layer of sacrificial material above the semiconductor substrate; patterning an opening through the layers of sacrificial material and silicide and into the semiconductor substrate such that an exposed portion of the semiconductor substrate is formed; and forming a metal gate conductor upon a metal oxide gate dielectric exclusively within the opening and upon the exposed portion of the semiconductor substrate.
Claim 3
Dependent Claim
26 words
The method of claim 1, wherein said forming a silicide layer occurs prior to said forming the metal gate conductor or the metal oxide gate dielectric.
Claim 4
Dependent Claim
37 words
The method of claim 2, wherein said forming a silicide layer comprises annealing, in a single cycle, a refractory metal layer arranged above the impurity region at a temperature exceeding 1000° C. to form the silicide layer.
Claim 5
Dependent Claim
28 words
The method of claim 1, wherein said forming the metal oxide gate dielectric comprises forming a dielectric layer comprising oxynitride upon the exposed portion of the semiconductor substrate.
Claim 6
Dependent Claim
72 words
The method of claim 1, wherein said forming the metal gate dielectric comprises: forming a dielectric layer upon the exposed portion of the semiconductor substrate and within the confines of the opening; forming the metal gate conductor above the dielectric layer; and heating the metal gate conductor and the dielectric layer such that the metal oxide gate dielectric is formed at an interface between the metal gate conductor and the dielectric layer.
Claim 7
Dependent Claim
69 words
The method of claim 5, wherein said forming the metal gate conductor occurs prior to said heating and comprises: depositing a metal layer into the opening and upon an upper surface of the layer of sacrificial material; and polishing the metal layer to form the metal gate conductor exclusively within the opening and having an upper surface substantially coplanar with the upper surface of the layer of sacrificial material.
Claim 8
Dependent Claim
24 words
The method of claim 1, wherein the opening extends substantially through the impurity region such that the impurity region is divided into source/drain regions.
Claim 9
Dependent Claim
37 words
The method of claim 1, wherein said metal gate conductor primarily comprises tungsten, and wherein said metal oxide primarily comprises tungsten oxide having a formula of WO x , and wherein x is between 1 and 3.
Claim 10
Dependent Claim
35 words
The method of claim 1, wherein said patterning an opening further comprises patterning the opening through the impurity region such that the impurity region is divided by the opening into a pair of source/drain regions.
Claim 11
Dependent Claim
28 words
The method of claim 1, wherein said forming a layer of sacrificial material above the semiconductor substrate comprises depositing the layer of sacrificial material upon the silicide layer.
Claim 12
Independent Claim
96 words
A method for forming a transistor, comprising: patterning an opening through a sacrificial material and partially into a single crystal silicon substrate such that an exposed portion of the single crystal silicon substrate is formed; growing a dielectric layer upon the exposed portion of the single crystal silicon substrate; depositing a metal layer upon the dielectric layer; and reacting a portion of the metal layer and a portion of the dielectric layer such that a metal oxide gate dielectric is formed beneath the metal layer at an interface between the metal layer and the dielectric layer.
Claim 13
Independent Claim
96 words
A method for forming a transistor, comprising: patterning an opening through a sacrificial material and partially into a single crystal silicon substrate such that an exposed portion of the single crystal silicon substrate is formed; growing a dielectric layer upon the exposed portion of the single crystal silicon substrate; depositing a metal layer upon the dielectric layer; and reacting a portion of the metal layer and a portion of the dielectric layer such that a metal oxide gate dielectric is formed beneath the metal layer at an interface between the metal layer and the dielectric layer.
Claim 14
Dependent Claim
36 words
The method of claim 11, wherein said patterning an opening comprises etching a portion of an impurity region within the single crystal silicon substrate and a portion of a silicide layer formed upon the impurity region.
Claim 15
Dependent Claim
39 words
The method of claim 12, wherein said patterning an opening further comprises etching through the impurity region within the single crystal silicon substrate such that the impurity region is divided by the opening into a pair of source/drain regions.
Claim 16
Dependent Claim
21 words
The method of claim 11, wherein said reacting comprises annealing the metal layer and the dielectric layer in an inert ambient.
Claim 17
Dependent Claim
21 words
The method of claim 11, wherein said reacting comprises annealing the metal layer and the dielectric layer in an oxygen-bearing ambient.
Claim 18
Dependent Claim
30 words
The method of claim 11, wherein said reacting comprises forming a metal gate conductor comprising the metal layer exclusive of the portion that partially forms the metal oxide gate dielectric.
Claim 19
Dependent Claim
39 words
The method of claim 11, wherein said reacting comprises forming a gate dielectric comprising the metal oxide gate dielectric and the dielectric layer exclusive of the portion of the dielectric layer that partially forms the metal oxide gate dielectric.
Claim 20
Dependent Claim
21 words
The method of claim 17, wherein the gate dielectric comprises a capacitance per unit area equivalent to 5-15 angstroms of oxide.
Claim 21
Dependent Claim
21 words
The method of claim 11, wherein said reacting continues for a time sufficient to consume the entirety of said dielectric layer.
References Cited (Backward Citations)
DE1923279A1
Cited
JPS59215774A
Cited
US4683645A
Cited
US4731339A
Cited
US4992387A
Cited
US5268590A
Cited
US5120668A
Cited
US5445977A
Cited
US5252502A
Cited
EP0614226A1
Cited
US5583067A
Cited
US5717254A
Cited
US5576227A
Cited
US5646435A
Cited
US5654570A
Cited
US5834811A
Cited
US5821594A
Cited
US5960270A
Cited
US5918130A
Cited
US5970354A
Cited
US5955759A
Cited
US5904517A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-31 | 2004-05-01 | 2004-10-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-31 | 2008-05-01 | 2008-10-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-31 | 2012-05-01 | 2012-10-31 | $7700.00 | Window Closed / Lapsed |