Process for fabricating a recessed gate MOS device

Claim 1

A process for fabricating a MOS device having a recessed gate on a silicon substrate, comprising the steps of: forming a barrier layer on said silicon substrate where a gate electrode is to be formed; forming first sidewall spacers on side walls of said barrier layer; implanting impurities of a first conductivity type into said silicon substrate at an oblique angle to form source/drain regions by using said barrier layer and said first sidewall spacers as a first mask, wherein said source/drain regions extending to the areas underlying said first sidewall spacers; forming a metal silicide layer on the surface of said source/drain regions; sequentially etching said barrier layer and portion of said silicon substrate underlying said barrier layer to form a trench by using said first sidewall spacers and said metal silicide layer as a second mask; forming second sidewall spacers on side walls of said trench; implanting impurities of a second conductivity type into portion of said silicon substrate underlying said trench to form an anti-punchthrough region; and sequentially forming a gate oxide layer and a gate layer in said trench.

Claim 13

A method of fabricating a recessed gate MOS device comprising the steps of: forming a barrier layer on a silicon substrate where a gate electrode is to be formed, the barrier layer having sidewall spacers at side edges of the barrier layer; forming source/drain regions by implanting impurities of a first conductivity type into said silicon substrate, using the barrier layer and the sidewall spacers as a first mask; forming a silicide layer on said source/drain regions; removing the barrier layer and forming a trench in the silicon substrate using the sidewall spacers and silicide layer as a second mask; forming an anti-punchthrough region by implanting impurities of a second conductivity type into a portion of said silicon substrate underlying said trench; and forming a gate layer within said trench, said gate layer being separated from said anti-punchthrough region by a gate oxide layer.

Claim 14

A method of fabricating a recessed gate MOS device comprising the steps of: forming a barrier layer on a silicon substrate where a gate electrode is to be formed, the barrier layer having sidewall spacers at side edges of the barrier layer; forming source/drain regions by implanting impurities of a first conductivity type into said silicon substrate, using the barrier layer and the sidewall spacers as a first mask; forming a silicide layer on said source/drain regions; removing the barrier layer and forming a trench in the silicon substrate using the sidewall spacers and silicide layer as a second mask; forming an anti-punchthrough region by implanting impurities of a second conductivity type into a portion of said silicon substrate underlying said trench; and forming a gate layer within said trench, said gate layer being separated from said anti-punchthrough region by a gate oxide layer.