Patent US1833134A successfully refreshed from Google Patents.
Patent US6016060A successfully refreshed from Google Patents.
← Back to Patent Explorer
US6016060A Expired / Lapsed US ⏱️ 0.0 years remaining

Method, apparatus and system for testing bumped semiconductor components

Assignee: Micron Technology Inc
•
Filing: 1997-03-25
•
Granted: 2000-01-18
•
Expires: 2017-03-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method, apparatus and system for establishing temporary electrical communication with semiconductor components having contact bumps are provided. The apparatus includes an interconnect having patterns of contact members adapted to electrically contact the contact bumps. Each contact member includes an array of one or more electrically conductive projections in electrical communication with an associated conductor. The projections form contact members for retaining individual contact bumps on the semiconductor components. The projections can be pillars having angled faces covered with a conductive layer. Alternately the projections can be a material deposited on the substrate, or can be microbumps formed on multi layered tape bonded to the substrate. The interconnect can be employed in a wafer level test system for testing dice contained on a wafer, or in a die level test system for testing bare bumped dice or bumped chip scale packages.

Inventors

  • 👤 Salman Akram
  • 👤 Warren M. Farnworth
  • 👤 Alan G. Wood
  • 👤 David R. Hembree

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 05:56
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R1/0433; G01R1/0441; G01R1/0466

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 86 words
An interconnect for a semiconductor component comprising: a substrate; and a contact member configured to electrically engage a contact bump on the component, the contact member comprising a plurality of electrically conductive projections on the substrate configured to retain the contact bump therebetween, each projection comprising a raised portion of the substrate at least partially covered with a non-bonding conductive layer, each projection comprising at least one edge configured to penetrate the contact bump and at least one face configured to electrically engage the contact bump.
Claim 2
Dependent Claim 86 words
An interconnect for a semiconductor component comprising: a substrate; and a contact member configured to electrically engage a contact bump on the component, the contact member comprising a plurality of electrically conductive projections on the substrate configured to retain the contact bump therebetween, each projection comprising a raised portion of the substrate at least partially covered with a non-bonding conductive layer, each projection comprising at least one edge configured to penetrate the contact bump and at least one face configured to electrically engage the contact bump.
Claim 3
Dependent Claim 10 words
The interconnect of claim 1 wherein the substrate comprises silicon.
Claim 4
Dependent Claim 15 words
The interconnect of claim 1 wherein the contact member comprises from three to five projections.
Claim 5
Dependent Claim 41 words
The interconnect of claim 1 wherein the conductive layer comprises an element selected from the group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Mo, W, Tc, Re, B, C, Si and Ge.
Claim 6
Dependent Claim 107 words
An interconnect for a semiconductor component comprising: a substrate; a plurality of projections on the substrate sized and spaced to form a contact member configured to retain and electrically engage a contact bump on the component, the projections comprising portions of the substrate at least partially covered with an electrically conductive layer comprising a material that does not bond to the contact bump, each projection having a generally truncated pyramidal configuration comprising at least one edge configured to penetrate the contact bump and at least one face configured to electrically engage the contact bump; and a conductor on the substrate in electrical communication with the conductive layer.
Claim 7
Dependent Claim 107 words
An interconnect for a semiconductor component comprising: a substrate; a plurality of projections on the substrate sized and spaced to form a contact member configured to retain and electrically engage a contact bump on the component, the projections comprising portions of the substrate at least partially covered with an electrically conductive layer comprising a material that does not bond to the contact bump, each projection having a generally truncated pyramidal configuration comprising at least one edge configured to penetrate the contact bump and at least one face configured to electrically engage the contact bump; and a conductor on the substrate in electrical communication with the conductive layer.
Claim 8
Dependent Claim 10 words
The interconnect of claim 5 wherein the substrate comprises silicon.
Claim 9
Dependent Claim 40 words
The interconnect of claim 5 wherein the material comprises an element selected from the group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Mo, W, Tc, Re, B, C, Si and Ge.
Claim 10
Dependent Claim 15 words
The interconnect of claim 5 wherein the contact member comprises from three to five projections.
Claim 11
Dependent Claim 23 words
The interconnect of claim 5 wherein the contact member comprises from three to five angled faces configured to electrically engage the contact bump.
Claim 12
Dependent Claim 98 words
An interconnect for electrically contacting a semiconductor component comprising: a substrate; and a contact member configured to electrically engage a contact bump on the component, the contact member comprising a plurality of projections comprising raised portions of the substrate at least partially covered with a conductive layer comprising a material that is non-bonding with the contact bump, the projections sized and spaced to retain the contact bump therebetween, the projections and the conductive layer comprising a plurality of edges configured to penetrate into the contact bump and a plurality of faces configured to electrically engage the contact bump.
Claim 13
Dependent Claim 98 words
An interconnect for electrically contacting a semiconductor component comprising: a substrate; and a contact member configured to electrically engage a contact bump on the component, the contact member comprising a plurality of projections comprising raised portions of the substrate at least partially covered with a conductive layer comprising a material that is non-bonding with the contact bump, the projections sized and spaced to retain the contact bump therebetween, the projections and the conductive layer comprising a plurality of edges configured to penetrate into the contact bump and a plurality of faces configured to electrically engage the contact bump.
Claim 14
Dependent Claim 10 words
The interconnect of claim 10 wherein the substrate comprises silicon.
Claim 15
Dependent Claim 41 words
The interconnect of claim 10 wherein the conductive layer comprises an element selected from the group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Mo, W, Tc, Re, B, C, Si, and Ge.
Claim 16
Dependent Claim 19 words
The interconnect of claim 10 wherein the contact member comprises from three to five projections in a spaced array.
Claim 17
Dependent Claim 117 words
An interconnect for electrically contacting a semiconductor component having contact bumps comprising: a substrate; a plurality of contact members on the substrate, each contact member comprising a plurality of electrically conductive projections formed in a spaced array and configured to retain and electrically engage a contact bump on the component, each projection having a truncated pyramidal configuration comprising at least one angled face configured to electrically contact the contact bump and at least one edge configured to penetrate the contact bump, such that the contact bump is penetrated by a plurality of edges and electrically contacted by a plurality of angled faces; and at least one conductor on the substrate in electrical communication with the conductive projections.
Claim 18
Dependent Claim 117 words
An interconnect for electrically contacting a semiconductor component having contact bumps comprising: a substrate; a plurality of contact members on the substrate, each contact member comprising a plurality of electrically conductive projections formed in a spaced array and configured to retain and electrically engage a contact bump on the component, each projection having a truncated pyramidal configuration comprising at least one angled face configured to electrically contact the contact bump and at least one edge configured to penetrate the contact bump, such that the contact bump is penetrated by a plurality of edges and electrically contacted by a plurality of angled faces; and at least one conductor on the substrate in electrical communication with the conductive projections.
Claim 19
Dependent Claim 18 words
The interconnect of claim 14 wherein the substrate comprises silicon and the projections comprise portions of the substrate.
Claim 20
Independent Claim 135 words
A method for testing a semiconductor component comprising: providing testing circuitry; providing an interconnect for establishing electrical communication between the component and the testing circuitry, the interconnect comprising a substrate and a contact member comprising a plurality of projections comprising raised portions of the substrate at least partially covered with a non-bonding conductive layer and configured to retain and electrically contact a contact bump of the component therebetween, each projection comprising at least one edge configured to penetrate the contact bump and at least one face configured to electrically engage the contact bump; placing the component on the interconnect with the contact bump in electrical communication with the projections, and the conductive layer in electrical communication with the testing circuitry; and applying test signals through the contact member and the contact bump to the component.
Claim 21
Independent Claim 135 words
A method for testing a semiconductor component comprising: providing testing circuitry; providing an interconnect for establishing electrical communication between the component and the testing circuitry, the interconnect comprising a substrate and a contact member comprising a plurality of projections comprising raised portions of the substrate at least partially covered with a non-bonding conductive layer and configured to retain and electrically contact a contact bump of the component therebetween, each projection comprising at least one edge configured to penetrate the contact bump and at least one face configured to electrically engage the contact bump; placing the component on the interconnect with the contact bump in electrical communication with the projections, and the conductive layer in electrical communication with the testing circuitry; and applying test signals through the contact member and the contact bump to the component.
Claim 22
Dependent Claim 41 words
The method of claim 16 wherein the conductive layer comprises an element selected from the group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Mo, W, Tc, Re, B, C, Si and Ge.
Claim 23
Dependent Claim 15 words
The method of claim 16 wherein each contact member comprises from three to five projections.
Claim 24
Independent Claim 137 words
A method for testing a semiconductor component comprising: providing testing circuitry; providing an interconnect for establishing electrical communication between the component and the testing circuitry, the interconnect comprising a substrate and a plurality of projections comprising portions of the substrate at least partially covered with a non-bonding conductive layer and configured to retain a contact bump on the component therebetween, each projection having a generally truncated pyramidal configuration such that the projections form a contact member having a plurality of angled faces configured to electrically contact the contact bump and a plurality of edges configured to penetrate the contact bump; placing the component on the interconnect with the contact bump in electrical communication with the conductive layer and with the testing circuitry; and applying test signals through the conductive layer and the contact bump to the component.
Claim 25
Independent Claim 137 words
A method for testing a semiconductor component comprising: providing testing circuitry; providing an interconnect for establishing electrical communication between the component and the testing circuitry, the interconnect comprising a substrate and a plurality of projections comprising portions of the substrate at least partially covered with a non-bonding conductive layer and configured to retain a contact bump on the component therebetween, each projection having a generally truncated pyramidal configuration such that the projections form a contact member having a plurality of angled faces configured to electrically contact the contact bump and a plurality of edges configured to penetrate the contact bump; placing the component on the interconnect with the contact bump in electrical communication with the conductive layer and with the testing circuitry; and applying test signals through the conductive layer and the contact bump to the component.
Claim 26
Dependent Claim 10 words
The method of claim 19 wherein the substrate comprises silicon.
Claim 27
Dependent Claim 117 words
An interconnect for a semiconductor component comprising: a substrate comprising silicon; and a contact member on the substrate configured to electrically engage a contact bump on the component, the contact member comprising a plurality of projections comprising portions of the substrate configured to retain a contact bump on the component therebetween, and a conductive layer at least partially covering the projections comprising an element selected from the group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Mo, W, Tc, Re, B, C, Si and Ge, the projections comprising a plurality of edges for penetrating the contact bump and a plurality of angled faces for electrically contacting the contact bump.
Claim 28
Dependent Claim 117 words
An interconnect for a semiconductor component comprising: a substrate comprising silicon; and a contact member on the substrate configured to electrically engage a contact bump on the component, the contact member comprising a plurality of projections comprising portions of the substrate configured to retain a contact bump on the component therebetween, and a conductive layer at least partially covering the projections comprising an element selected from the group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Mo, W, Tc, Re, B, C, Si and Ge, the projections comprising a plurality of edges for penetrating the contact bump and a plurality of angled faces for electrically contacting the contact bump.
Claim 29
Dependent Claim 15 words
The interconnect of claim 21 wherein the contact member comprises from three to five projections.
Claim 30
Dependent Claim 22 words
The interconnect of claim 21 wherein the contact member is configured to electrically engage different sizes of contact bumps on the component.
Claim 31
Dependent Claim 14 words
The interconnect of claim 21 wherein the projections comprise etched portions of the substrate.
Claim 32
Dependent Claim 14 words
The interconnect of claim 21 wherein the projections comprise generally pyramidally shaped truncated pillars.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-01-17 2003-07-19 2004-01-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-01-17 2007-07-19 2008-01-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-01-17 2011-07-19 2012-01-18 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag