Patent US5936868A successfully refreshed from Google Patents.
US5936868A
Expired / Lapsed
US
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Method for converting an integrated circuit design for an upgraded process
Assignee: Harris Corp
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Filing: 1997-03-06
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Granted: 1999-08-10
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Expires: 2017-03-06
Abstract
Abstract A method for converting an original integrated circuit (IC) design to an updated IC design for an updated manufacturing process includes accessing a mask database for the original IC design and manipulating the data by various scaling steps and other modifications. The original IC design may include contacts so the method includes the steps of performing a first downward size scaling on the mask data to scale down the original IC design, and selectively performing a second downward size scaling on the mask data to further scale down the contacts. The step of selectively performing the second downward size scaling may preferably include the steps of displaying and viewing an image of the IC design to aid in selection. The vias of the IC design may also be scaled downward. The method may also further include the step of selectively performing a downward size scaling on the mask data in at least one dimension to further scale down a size of the polysilicon gates. The method may further include the steps of selectively performing an upward size scaling on the mask data to scale up the power supply rails, and selectively performing an upward size scaling on the mask data to scale up the bond pads. The original test and alignment structures are preferably replaced by new test structures and alignment keys for the updated process, and new ESD protection may be substituted for the original ESD protection.
Inventors
- 👤 David W. Hall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 03:35
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/39
Claims Analysis
Total Claims: 60
Claim 1
Independent Claim
159 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising contacts and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a second downward size scaling on the mask data to further scale down the contacts; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 2
Independent Claim
159 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising contacts and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a second downward size scaling on the mask data to further scale down the contacts; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 3
Dependent Claim
41 words
A method according to claim 1 wherein the step of selectively performing the second downward size scaling comprises the steps of displaying and viewing an image of the IC design, and selecting the contacts based on displaying and viewing the image.
Claim 4
Dependent Claim
45 words
A method according to claim 1 wherein the mask data of the original IC circuit design identifies contacts; and wherein the step of selectively performing the second downward size scaling comprises the step of selecting the contacts based upon the mask data identifying the contacts.
Claim 5
Dependent Claim
30 words
A method according to claim 1 wherein the steps of performing the first downward size scaling and selectively performing the second downward size scaling are each performed in two dimensions.
Claim 6
Dependent Claim
39 words
A method according to claim 1 wherein each contact defines a respective center point; and wherein the step of selectively performing the second downward size scaling comprises selectively performing same while maintaining the respective center point of each contact.
Claim 7
Dependent Claim
46 words
A method according to claim 1 wherein the step of performing the first downward size scaling comprises performing same by a first factor; and wherein the step of selectively performing the second downward scaling comprises performing same by a second factor different from the first factor.
Claim 8
Dependent Claim
29 words
A method according to claim 1 further comprising the steps of displaying and viewing an image of the IC design, and correcting errors determined based on viewing the image.
Claim 9
Dependent Claim
36 words
A method according to claim 1 wherein the original IC design comprises vias; and further comprises the step of selectively performing a third downward size scaling on the mask data to further scale down the vias.
Claim 10
Dependent Claim
41 words
A method according to claim 8 wherein the step of selectively performing the third downward size scaling comprises the steps of displaying and viewing an image of the IC design, and selecting the vias based on displaying and viewing the image.
Claim 11
Dependent Claim
45 words
A method according to claim 1 wherein the original IC design includes at least one elongate contact; and further comprising the step of selectively performing a division of the at least one elongate contact on the mask data into a plurality of generally square contacts.
Claim 12
Dependent Claim
42 words
A method according to claim 10 wherein the step of selectively performing the division comprises the steps of displaying and viewing an image of the IC design, and selecting the at least one elongate contact based on displaying and viewing the image.
Claim 13
Dependent Claim
27 words
A method according to claim 10 further comprising the step of selectively adding a connector to the mask data to connect the plurality of generally square contacts.
Claim 14
Dependent Claim
57 words
A method according to claim 1 wherein the original IC design includes at least one polysilicon gate for a respective MOS device; and further comprising the step of selectively performing a fourth downward size scaling on the mask data in at least one dimension to further scale down a size of the at least one polysilicon gate.
Claim 15
Dependent Claim
61 words
A method according to claim 13 wherein the mask data of the original IC design identifies active areas and polysilicon areas; and wherein the step of selectively performing the fourth downward size scaling comprises selecting the at least one polysilicon gate based upon the mask data identifying at least one area that is both an active area and a polysilicon area.
Claim 16
Dependent Claim
16 words
A method according to claim 1 further comprising the step of running simulations for circuit delays.
Claim 17
Dependent Claim
45 words
A method according to claim 1 wherein the step of selectively performing the fifth upward scaling comprises the steps of displaying and viewing an image of the IC design, and selecting the at least one power supply rail based on displaying and viewing the image.
Claim 18
Dependent Claim
32 words
A method according to claim 1 wherein the original IC design comprises original electrostatic discharge (ESD) protection, and further comprising the step of substituting new ESD protection for the original ESD protection.
Claim 19
Dependent Claim
69 words
A method according to claim 1 wherein the step of determining a scaling factor includes: determining a desired width upward scaling factor based on a desired voltage noise ratio between the original process and the updated process; and the method further comprising the step of: selectively adding at least one additional parallel supply rail based upon determining that the desired width upward scaling factor is greater than about two.
Claim 20
Dependent Claim
36 words
A method according to claim 1 wherein the original IC comprises bond pads; and further comprising the step of selectively performing a sixth upward size scaling on the mask data to scale up the bond pads.
Claim 21
Dependent Claim
41 words
A method according to claim 19 wherein the step of selectively performing the sixth upward scaling comprises the steps of displaying and viewing an image of the IC design, and selecting the bond pads based on displaying and viewing the image.
Claim 22
Dependent Claim
30 words
A method according to claim 19 wherein the step of selectively performing a sixth upward size scaling comprises the steps of performing same while avoiding intrusion into adjacent circuit portions.
Claim 23
Dependent Claim
39 words
A method according to claim 1 wherein the original IC design comprises original test structures and alignment keys; and further comprising the step of substituting new test structures and alignment keys for the original test structures and alignment keys.
Claim 24
Independent Claim
159 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising vias and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a third downward size scaling on the mask data to further scale down the vias; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 25
Independent Claim
159 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising vias and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a third downward size scaling on the mask data to further scale down the vias; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 26
Dependent Claim
16 words
A method according to claim 23 further comprising the step of running simulations for circuit delays.
Claim 27
Dependent Claim
32 words
A method according to claim 23 wherein the original IC design comprises original electrostatic discharge (ESD) protection, and further comprising the step of substituting new ESD protection for the original ESD protection.
Claim 28
Dependent Claim
41 words
A method according to claim 23 wherein the step of selectively performing the third downward size scaling comprises the steps of displaying and viewing an image of the IC design, and selecting the vias based on displaying and viewing the image.
Claim 29
Dependent Claim
30 words
A method according to claim 23 wherein the steps of performing the first downward size scaling and selectively performing the third downward size scaling are each performed in two dimensions.
Claim 30
Dependent Claim
39 words
A method according to claim 23 wherein each via defines a respective center point; and wherein the step of selectively performing the third downward size scaling comprises selectively performing same while maintaining the respective center point of each via.
Claim 31
Dependent Claim
46 words
A method according to claim 23 wherein the step of performing the first downward size scaling comprises performing same by a first factor; and wherein the step of selectively performing the third downward scaling comprises performing same by a third factor different from the first factor.
Claim 32
Dependent Claim
29 words
A method according to claim 23 further comprising the steps of displaying and viewing an image of the IC design, and correcting errors determined based on viewing the image.
Claim 33
Dependent Claim
39 words
A method according to claim 23 wherein the original IC design comprises original test structures and alignment keys; and further comprising the step of substituting new test structures and alignment keys for the original test structures and alignment keys.
Claim 34
Independent Claim
175 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising at least one polysilicon gate for a respective MOS device and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a fourth downward size scaling on the mask data to further scale down a size of the at least one polysilicon gate; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 35
Independent Claim
175 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising at least one polysilicon gate for a respective MOS device and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a fourth downward size scaling on the mask data to further scale down a size of the at least one polysilicon gate; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 36
Dependent Claim
16 words
A method according to claim 32 further comprising the step of running simulations for circuit delays.
Claim 37
Dependent Claim
32 words
A method according to claim 32 wherein the original IC design comprises original electrostatic discharge (ESD) protection, and further comprising the step of substituting new ESD protection for the original ESD protection.
Claim 38
Dependent Claim
62 words
A method according to claim 32 wherein the mask data of the original IC circuit design identifies active areas and polysilicon areas; and wherein the step of selectively performing the fourth downward size scaling comprises selecting the at least one polysilicon gate based upon the mask data identifying at least one area that is both an active area and a polysilicon area.
Claim 39
Dependent Claim
41 words
A method according to claim 32 wherein the step of performing the first downward size scaling is performed in two dimensions; and wherein the step of selectively performing the fourth downward size scaling is each performed in at least one dimension.
Claim 40
Dependent Claim
46 words
A method according to claim 32 wherein the step of performing the first downward size scaling comprises performing same by a first factor; and wherein the step of selectively performing the fourth downward scaling comprises performing same by a fourth factor different from the first factor.
Claim 41
Dependent Claim
29 words
A method according to claim 32 further comprising the steps of displaying and viewing an image of the IC design, and correcting errors determined based on viewing the image.
Claim 42
Dependent Claim
39 words
A method according to claim 32 wherein the original IC design comprises original test structures and alignment keys; and further comprising the step of substituting new test structures and alignment keys for the original test structures and alignment keys.
Claim 43
Independent Claim
140 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 44
Independent Claim
140 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 45
Dependent Claim
16 words
A method according to claim 40 further comprising the step of running simulations for circuit delays.
Claim 46
Dependent Claim
32 words
A method according to claim 40 wherein the original IC design comprises original electrostatic discharge (ESD) protection, and further comprising the step of substituting new ESD protection for the original ESD protection.
Claim 47
Dependent Claim
45 words
A method according to claim 40 wherein the step of selectively performing the fifth upward scaling comprises the steps of displaying and viewing an image of the IC design, and selecting the at least one power supply rail based on displaying and viewing the image.
Claim 48
Dependent Claim
39 words
A method according to claim 40 wherein the original IC design comprises original test structures and alignment keys; and further comprising the step of substituting new test structures and alignment keys for the original test structures and alignment keys.
Claim 49
Dependent Claim
68 words
A method according to claim 40 wherein the step of determining a scaling factor includes determining a desired width upward scaling factor based on a desired voltage noise ratio between the original process and the updated process; and the method further comprising the step selectively adding at least one additional parallel supply rail based upon determining that the desired width upward scaling factor is greater than about two.
Claim 50
Dependent Claim
41 words
A method according to claim 40 wherein the step of performing the first downward size scaling is performed in two dimensions; and wherein the step of selectively performing the fifth upward size scaling is each performed in at least one dimension.
Claim 51
Dependent Claim
29 words
A method according to claim 40 further comprising the steps of displaying and viewing an image of the IC design, and correcting errors determined based on viewing the image.
Claim 52
Independent Claim
160 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising bond pads and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; selectively performing a sixth upward size scaling on the mask data to scale up the bond pads; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 53
Independent Claim
160 words
A method for converting an original integrated circuit (IC) design for an original manufacturing process to an updated IC design for an updated manufacturing process, the original IC design comprising bond pads and at least one power supply rail, the method comprising the steps of: accessing a database comprising mask data for the original IC design; performing a first downward size scaling on the mask data to scale down the original IC design; selectively performing a fifth upward size scaling on the mask data to scale up the at least one power supply rail, the step of selectively performing a fifth upward size scaling including the step of determining a scaling factor based on a desired voltage noise ratio between the original process and the updated process; selectively performing a sixth upward size scaling on the mask data to scale up the bond pads; and thereafter storing updated mask data for the updated IC design for the updated manufacturing process.
Claim 54
Dependent Claim
16 words
A method according to claim 48 further comprising the step of running simulations for circuit delays.
Claim 55
Dependent Claim
32 words
A method according to claim 48 wherein the original IC design comprises original electrostatic discharge (ESD) protection, and further comprising the step of substituting new ESD protection for the original ESD protection.
Claim 56
Dependent Claim
39 words
A method according to claim 48 wherein the original IC design comprises original test structures and alignment keys; and further comprising the step of substituting new test structures and alignment keys for the original test structures and alignment keys.
Claim 57
Dependent Claim
41 words
A method according to claim 48 wherein the step of selectively performing the sixth upward scaling comprises the steps of displaying and viewing an image of the IC design, and selecting the bond pads based on displaying and viewing the image.
Claim 58
Dependent Claim
30 words
A method according to claim 48 wherein the step of selectively performing the sixth upward size scaling comprises the step of performing same while avoiding intrusion onto adjacent circuit portions.
Claim 59
Dependent Claim
38 words
A method according to claim 48 wherein the step of performing the first downward size scaling is performed in two dimensions; and wherein the step of selectively performing the sixth upward size scaling is performed in two dimensions.
Claim 60
Dependent Claim
29 words
A method according to claim 48 further comprising the steps of displaying and viewing an image of the IC design, and correcting errors determined based on viewing the image.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-08-09 | 2003-02-08 | 2003-08-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-08-09 | 2007-02-08 | 2007-08-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-08-09 | 2011-02-08 | 2011-08-10 | $7700.00 | Window Closed / Lapsed |