Patent US5880989A successfully refreshed from Google Patents.
US5880989A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sensing methodology for a 1T/1C ferroelectric memory
Assignee: Monterey Research LLC
•
Filing: 1997-11-14
•
Granted: 1999-03-09
•
Expires: 2017-11-14
Abstract
Abstract A method of operating a 1T/1C ferroelectric memory having a memory cell coupled to a word line, a bit line, and a plate line, includes the steps of turning on the word line, energizing the plate line to establish a charge on the bit line, turning off the word line, and sensing the charge on the bit line while the word line is off.
Inventors
- 👤 Dennis R. Wilson
- 👤 William F. Kraus
- 👤 Lark Edward Lehman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:35
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/22
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
62 words
A method of operating a ferroelectric memory having a memory cell coupled to a word line, a bit line, and a plate line, the method comprising: turning on the word line; energizing the plate line to establish a charge on the bit line; turning off the word line; and sensing the charge on the bit line while the word line is off.
Claim 2
Independent Claim
62 words
A method of operating a ferroelectric memory having a memory cell coupled to a word line, a bit line, and a plate line, the method comprising: turning on the word line; energizing the plate line to establish a charge on the bit line; turning off the word line; and sensing the charge on the bit line while the word line is off.
Claim 3
Dependent Claim
31 words
The method of claim 1 in which energizing the plate line to establish a charge on the bit line comprises pulsing the plate line before the bit line charge is sensed.
Claim 4
Dependent Claim
31 words
The method of claim 1 in which energizing the plate line to establish a charge on the bit line comprises stepping the plate line before the bit line charge is sensed.
Claim 5
Dependent Claim
28 words
The method of claim 1 in which sensing the charge on the bit line is performed at a predetermined time interval after the word line is turned off.
Claim 6
Dependent Claim
40 words
The method of claim 1 in which sensing the charge on the bit line is performed by a dual-input sense amplifier having a first input coupled to the bit line and a second input coupled to a reference voltage source.
Claim 7
Dependent Claim
41 words
The method of claim 1 further comprising turning the word line back on after the charge on the bit line has been sensed to allow an initial data state of the memory cell to be written back into the memory cell.
Claim 8
Dependent Claim
23 words
The method of claim 6 further comprising bootstrapping the word line voltage to a voltage in excess of a VDD power supply voltage.
Claim 9
Dependent Claim
25 words
The method of claim 6 further comprising turning the word line off after the initial data state has been written back into the memory cell.
Claim 10
Dependent Claim
20 words
The method of claim 8 in which the bit line is turned off before the word line is turned off.
Claim 11
Dependent Claim
20 words
The method of claim 8 in which the bit line is turned off after the word line is turned off.
Claim 12
Independent Claim
105 words
A method of operating a ferroelectric memory having an array of memory cells arranged in rows and columns, in which each row of memory cells is coupled to a word line and a plate line, and each column of memory cells is coupled to a bit line, the method comprising: turning on a word line coupled to a memory cell desired to be read; energizing a plate line associated with the memory cell to establish a charge on a bit line coupled to the memory cell; turning off the word line; and sensing the charge on the bit line while the word line is off.
Claim 13
Independent Claim
105 words
A method of operating a ferroelectric memory having an array of memory cells arranged in rows and columns, in which each row of memory cells is coupled to a word line and a plate line, and each column of memory cells is coupled to a bit line, the method comprising: turning on a word line coupled to a memory cell desired to be read; energizing a plate line associated with the memory cell to establish a charge on a bit line coupled to the memory cell; turning off the word line; and sensing the charge on the bit line while the word line is off.
Claim 14
Dependent Claim
31 words
The method of claim 11 in which energizing the plate line to establish a charge on the bit line comprises pulsing the plate line before the bit line charge is sensed.
Claim 15
Dependent Claim
31 words
The method of claim 11 in which energizing the plate line to establish a charge on the bit line comprises stepping the plate line before the bit line charge is sensed.
Claim 16
Dependent Claim
28 words
The method of claim 11 in which sensing the charge on the bit line is performed at a predetermined time interval after the word line is turned off.
Claim 17
Dependent Claim
40 words
The method of claim 11 in which sensing the charge on the bit line is performed by a dual-input sense amplifier having a first input coupled to the bit line and a second input coupled to a reference voltage source.
Claim 18
Dependent Claim
41 words
The method of claim 11 further comprising turning the word line back on after the charge on the bit line has been sensed to allow an initial data state of the memory cell to be written back into the memory cell.
Claim 19
Dependent Claim
23 words
The method of claim 16 further comprising bootstrapping the word line voltage to a voltage in excess of a VDD power supply voltage.
Claim 20
Dependent Claim
25 words
The method of claim 16 further comprising turning the word line off after the initial data state has been written back into the memory cell.
Claim 21
Dependent Claim
20 words
The method of claim 18 in which the bit line is turned off before the word line is turned off.
Claim 22
Dependent Claim
20 words
The method of claim 18 in which the bit line is turned off after the word line is turned off.
References Cited (Backward Citations)
US5029128A
Cited
US5010518A
Cited
US5517445A
Cited
US5265061A
Cited
US5038323A
Cited
US5297077A
Cited
US5400275A
Cited
US5086412A
Cited
US5262982A
Cited
US5414654A
Cited
US5455786A
Cited
US5539279A
Cited
US5406510A
Cited
US5517446A
Cited
US5515312A
Cited
US5524093A
Cited
US5615145A
Cited
US5671174A
Cited
US5668753A
Cited
US5508954A
Cited
US5608667A
Cited
US5592410A
Cited
US5663904A
Cited
US5638318A
Cited
US5677865A
Cited
US5694353A
Cited
US5764561A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-08 | 2002-09-07 | 2003-03-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-08 | 2006-09-07 | 2007-03-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-08 | 2010-09-07 | 2011-03-09 | $7700.00 | Window Closed / Lapsed |